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Author Topic: Akula0083 30 watt self running generator.  (Read 407901 times)

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Hmmm, why do i feel we are going round in circles?
This was what lost_bro already proposed a few pages back if i remember correctly.
Because this is the way to make the DU.C. respond linearly to the R11 pot.
You are asking the question and getting two similar answers.

Off course we can make this thing behave like we want (variable frequency / variable du.c),
But this is not what this replication is all about, at least not for me.
You are correct.
I thought that you had your private reasons for wanting to linearly vary the DU.C. with R11.  ...e.g. testing the high power components at low DU.C.

but we have to find out why this circuit is as it as, with all the components as they are.
With all the components as they are, it is obvious that the 2nd error amplifiers kills the output pulse as soon as the signal at R5 goes below ground.  This is known as "pulse by pulse limiting".
The 1st error amplifier behavior is more complex.  It responds to fast falling edges at R5.

Why does the d.c. not vary?
It does vary, but not gradually with a static feedback loop.  With a dynamic feedback loop, the du.c. can vary gradually on a pulse by pulse basis.

Can it not vary in this configuration?
It can vary gradually when a feedback loop is closed.  For example when pulse by pulse limiting occurs individual pulses may be shortened to intermediate widths.
When you do the experiment with the Rigol and variable ramp pulses, you will see when the pin 3 goes high.  If this pin goes high when the TL494's output is ON, the output pulse gets shortened.
If this shortening happens in synchronicity with TL494 internal oscillator, then intermediate output pulse widths can be generated.

Does it not need to vary?
I don't know because I don't know how that transformer is supposed to work.
Sometimes it is important to realize that I don't know.

I will continue to finish the rest of the print and put it all together without any further alterations first,
That's fine with me.  I wrote about those alterations only because they were needed to achieve the behavior you were asking for. (linear adjustment of the du.c with the R11 pot).
So the next test seems to be applying those variable ramp pulses to R7 without any circuit alterations...and monitoring pin 3.
« Last Edit: 2014-03-27, 07:19:36 by verpies »
   

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Yes. Using the unmodified circuit from this schematic, remove one side of R7 and connect the Rigol SG to it. Set it to "Ramp" 500Hz, HighL=+5.0V, LowL=+0.5V and the Symmetry to 90%.
Remove the power MOSFET or IGBT for these tests.

Verify with the scope that the LowL setting really gives you +500mV because there is a bug in some firmwares about this setting. We do not want to go below 0V because the 2nd error amplifier will get activated, as you have found out.

Vary the Symmetry setting to adjust the steepness of the falling edge applied to R7.

Monitor pin 3 with a scope. Depending on the R11 setting and the steepness of the falling edge applied to R7, you will observe positive pulses on pin 3.
There will be some settings that will result in rapid oscillations on pin 3.  

Anytime pin 3 goes high, the TL494 output DU.C. will decrease to 0%.

Right, works like a charm, see screenshot, but is it usefull somehow in the circuit we are replicating?

By the way,  i made a short video earlier showing what i mean with the 56% etc. d.c. values
The upper 2 traces (yellow pin 11, purple junction R16/R17) are between 56% and 100%
The blue trace is on the unused pin 8 and shows a d.c. between 44% and 0%
https://www.youtube.com/watch?v=4zOBVxgp5JI&feature=youtu.be


Regards Itsu
   
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@verpies,

Did you see my question one page back at Reply #345?

GL.
   

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Right, works like a charm, see screenshot, but is it usefull somehow in the circuit we are replicating?
Hmm, what is the yellow trace and what is the blue trace?  What signal is at R7 ?

The behavior of the 1st error amplifier is important because it tells us what is expected from the current flowing through the load.
   

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So if I understand you correctly, the second error amplifier is not in use because in the Akyla0083 circuit the plus input pin 16 is grounded
and the minus input pin can never go below zero volt because of the positive bias from the VREF voltage output.
That is almost correct. Pin 15 must go below 0V for the 2nd error amplifier to get activated.  (but not too low, as less than -0.3V is illegal and causes the chip to malfunction).
I write "almost" because it is possible for the R5/R7 junction to become negative when:
1) R5 is a wirewound inductive resistor.
2) The load LED's conduct in reverse because of:
    a) LED junction capacitance
    b) SRD effect.
    c)  Reverse junction breakdown and avalanche.

So I cannot state with absolute certainty that the 2nd error amplifier is unused.  Maybe it limits the output pulse width in case of some catastrophic event in order to protects the device ...or maybe it hunts for some SRD effect in the LEDs ...or core saturation.

And, the first error amplifier is not in use because there can be no pulses through the 22nF capacitor because the input to the 210 Ohm
resistor is DC because of the 10uF capacitor.
Again, maybe.
Indeed the 1st error amplifier needs steep falling edges to activate and the 10μF seems to prevent that.
But if you do the math, a 1μH inductive resistor (R5) will form a parallel LC tank with the 10μF capacitor that will oscillate at 50kHz - at this frequency the falling edges will be sufficiently steep to activate the 1st error amplifier.

Two unused error amplifiers completely deprive the TL494 of a feedback loop and make it into a fixed 555 oscillator.  It does not compute.
It is much more likely that the polarity of load LEDs is mistakenly reversed on that schematic.

The DC voltage over the 10uF capacitor will vary with the load current.
Yes, that's why that voltage seems ideal to monitor and limit the load current.... but it's backwards.
« Last Edit: 2014-03-27, 07:38:27 by verpies »
   
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That is almost correct. Pin 15 must go below 0V for the 2nd error amplifier to get activated.  (but not too low, as less than -0.3V is illegal and causes the chip to malfunction).
I write "almost" because it is possible for the R5/R7 junction to become negative when:
1) R5 is a wirewound inductive resistor.
2) The load LED's conduct in reverse because of:
    a) LED junction capacitance
    b) SRD effect.
    c)  Reverse junction breakdown and avalanche.

So I cannot state with absolute certainty that the 2nd error amplifier is unused.  Maybe it limits the output pulse width in case of some catastrophic event in order to protects the device ...or maybe it hunts for some SRD effect in the LEDs.
Again, maybe.
Indeed the 1st error amplifier needs steep falling edges to activate and the 10μF seems to prevent that.
But if you do the math, a 1μH inductive resistor (R5) will form a parallel LC tank with the 10μF capacitor that will oscillate at 50kHz - at this frequency the falling edges will be sufficiently steep to activate the 1st error amplifier.

Two unused error amplifiers completely deprive the TL494 of a feedback loop and make it into a fixed 555 oscillator.  It does not compute.
It is much more likely that the polarity of load LEDs is reversed on that schematic.
Yes, that's why that voltage seems ideal to monitor and limit the load current.... but it's backwards.


Verpies,

Thank you for the answer. I'm doing some simulations (using http://falstad.com/circuit/ ) and I get some effect
on the error amplifier. But, I had to use a low frequency and a higher value feed back capacitor because of
limitations in the simulator. Here is my sim file:

$ 1 5.0E-6 21.593987231061412 60 5.0 50
a 368 192 480 192 0 15.0 -15.0 1000000.0
c 480 128 368 128 0 2.2000000000000002E-8 -7.37297407604918
d 480 192 544 192 1 0.805904783
w 368 128 368 176 0
r 256 64 256 128 0 12000.0
174 256 128 256 288 0 4700.0 0.005 Resistance
r 256 288 256 352 0 2000.0
w 272 208 368 208 0
v 192 112 192 64 0 0 40.0 12.0 0.0 0.0 0.5
g 192 112 192 144 0
v 320 112 320 64 0 0 40.0 5.0 0.0 0.0 0.5
w 320 64 368 64 0
g 320 112 320 144 0
w 192 64 256 64 0
g 256 352 256 384 0
r 368 64 368 128 0 4000.0
c 336 240 336 288 0 4.7E-6 4.531756659791694
r 304 288 304 240 0 4000.0
w 336 288 304 288 0
w 304 240 304 176 0
w 304 176 288 176 0
w 288 176 288 64 0
w 288 64 320 64 0
w 336 240 336 176 0
w 336 176 368 176 0
r 336 288 336 336 0 210.0
c 384 336 384 368 0 1.0E-5 3.0
w 384 336 336 336 0
g 384 368 384 384 0
v 336 336 336 400 0 2 100.0 3.0 0.0 0.0 0.5
g 336 400 336 432 0
r 544 192 544 256 0 10000.0
g 544 256 544 288 0
x 124 76 164 82 0 24 +12
x 294 43 321 49 0 24 +5
r 448 336 448 400 0 1.0
g 448 400 448 432 0
w 448 336 384 336 0
r 544 192 544 128 0 27000.0
w 544 128 480 128 0
o 7 64 0 35 5.0 9.765625E-5 0 -1
o 31 64 0 35 20.0 0.0015625 1 -1

Added: And I probably did not get it right. :-)

GL.
   

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Thank you for the answer. I'm doing some simulations (using http://falstad.com/circuit/ ) and I get some effect
on the error amplifier. But, I had to use a low frequency and a higher value feed back capacitor because of
limitations in the simulator. Here is my sim file:
I don't have a problem with a higher frequency and real component values. See here.
It is educational to delete the 27k resistor and observe what changes...

I did not simulate R5 and C5 because I consider those components part of the Signal Source.
   

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By the way,  i made a short video earlier showing what i mean with the 56% etc. d.c. values
The upper 2 traces (yellow pin 11, purple junction R16/R17) are between 56% and 100%
The blue trace is on the unused pin 8 and shows a d.c. between 44% and 0%
https://www.youtube.com/watch?v=4zOBVxgp5JI&feature=youtu.be
That's a silly problem of terminology - not technology.
Formally, the duty cycle of the TL494 is specified as the percentage of the cycle when the output is ACTIVE, not when it is high (or low).  "Active" merely means that the output transistor is conducting.

There are two ways TL494 output transistors can be connected.  In the first method, the output is HIGH when active and in the second method, the output is LOW when active.  
You have the output transistor configured generate a LOW state when active (as in Fig.2).  See the diagrams below:
 

When measuring the duty cycle from outputs configured as LOW=ACTIVE, the scope channel should be inverted.


   

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Hmm, what is the yellow trace and what is the blue trace?  What signal is at R7 ?

The behavior of the 1st error amplifier is important because it tells us what is expected from the current flowing through the load.


Sorry i was not being clear, but the yellow trace is, as it always was in my videos on this circuit, the output of pin 11 measured at the junction of R16/R17.
The blue trace is the signal as measured at pin 3.
The signal on R7 is the signal as setup by my Rigol as described by you earlier.


The result (see above screenshot) is as you already predicted:  "Anytime pin 3 goes high, the TL494 output DU.C. will decrease to 0%.".   (in my terminology goes to 100%   ;) )

Regards Itsu
« Last Edit: 2014-03-27, 09:47:05 by Itsu »
   

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That's a silly problem of terminology - not technology.
Formally, the duty cycle of the TL494 is specified as the percentage of the cycle when the output is ACTIVE, not when it is high (or low).  "Active" merely means that the output transistor is conducting.

Yes, you are right, formally.
But i was describing to real visible output as shown by my scope to avoid confusion,  however the opposite seems to be the case.
I did in an earlier video mention that the circuit was using the common Emitter configuration by means of the 740 Ohm pull up resistor R16.

Quote
When measuring the duty cycle from outputs configured as LOW=ACTIVE, the scope channel should be inverted.

Good idea,  i will do that from now on.


Regards Itsu
« Last Edit: 2014-03-27, 09:51:27 by Itsu »
   
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Hi

I have no much time so shortly. I checked this circuit , no OU for me.  :-[ Interesting is that when I disconnect the secondry the light is brighter, and including secondary has an opposite effect to what expected - light is dimmer and consumption on source is higher. Maybe I should reverse secondary connection.
Anyway I could post simulation on Multisim but only normal DC boost part , very interesting indeed, and I believe some expert can make it self-running in simulation too! The only request from me is if I post simulation, then every change should be posted here freely (like GPL  ;D)  I really really think it can be simulated.
Although you have to be very patient and have big free time, I'm occupied now with other works. Tell me what you think
   

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The blue trace is the signal as measured at pin 3.
The signal on R7 is the signal as setup by my Rigol as described by you earlier.
V: "Anytime pin 3 goes high, the TL494 output DU.C. will decrease to 0%.".  
But what SigGen setting makes the pin 3 go high, and what setting keeps it at the low level?

If you make a video about behavior of pins 1,2,3 in the unaltered citcuit, try to show other members what happens to pin 3 as you adjust the ramp "Symmetry" on the SigGen.
They should see that when the falling edge gets steep enough then pin 3 changes, while the steepness of the rising edge does not matter at all.
Formally, the answer should be expresses like this:  "When the rate of change of voltage exceeds e.g. -1V/1µs at the input (R7), then the output (pin 3) gets activated."

This discovery is significant because it tells us what a boring circuit expects of the load and the transformer - the mysterious component.

This analysis already starts to bear fruit:
You have two signal feedback paths that "want" to function to shorten the widths of TL494's output pulses* and they react to:
1) the rate of change of current through the load.
2) the level of current through the load.

Ask yourself a question:  What common phenomenon causes transformer currents to change too quickly and reach dangerous levels ?



*  shortening output pulses on-the-fly could have been designed for protection of the device and/or for hunting of some effect ...or operating at a threshold of that effect.
   

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I have no much time so shortly. I checked this circuit , no OU for me.  :-[
That circuit is not mysterious.  The transformer is.  ...its connections to the circuit, too.

Interesting is that when I disconnect the secondary the light is brighter, and including secondary has an opposite effect to what expected - light is dimmer and consumption on source is higher.
You just described the behavior of a conventional transformer, where a load on the secondary winding increases the current in the primary winding.

Anyway I could post simulation on Multisim but only normal DC boost part
What is a normal DC boost part?  Doesn't the MultiSim simulate the TL492 chip?
   
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If you replace transformer with a coil and remove second diode and all related parts it is just DC-DC boost converter,right? TL494 is perfectly simulated in Multisim. I have simulated the modified circuit with totem pole driver and it works, maybe the original too but I was impatient and didn't know about the soft-start implemented. That circuit is very interesting but you have to make coffe and wait a few minutes before simulation goes to starting point. Ok, back to Kicad works
   

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But what SigGen setting makes the pin 3 go high, and what setting keeps it at the low level?

If you make a video about behavior of pins 1,2,3 in the unaltered citcuit, try to show other members what happens to pin 3 as you adjust the ramp "Symmetry" on the SigGen.
They should see that when the falling edge gets steep enough then pin 3 changes, while the steepness of the rising edge does not matter at all.
Formally, the answer should be expresses like this:  "When the rate of change of voltage exceeds e.g. -1V/1µs at the input (R7), then the output (pin 3) gets activated."

This discovery is significant because it tells us what a boring circuit expects of the load and the transformer - the mysterious component.

This analysis already starts to bear fruit:
You have two signal feedback paths that "want" to function to shorten the widths of TL494's output pulses* and they react to:
1) the rate of change of current through the load.
2) the level of current through the load.

Ask yourself a question:  What common phenomenon causes transformer currents to change too quickly and reach dangerous levels ?



*  shortening output pulses on-the-fly could have been designed for protection of the device and/or for hunting of some effect ...or operating at a threshold of that effect.

OK,  i have set up the scope to monitor the pins 1, 2 and 3 signals together with the pin 11 (output) signal while inputting this ramp signal on R5/R7 as mentioned earlier.
At the end i substitute the pin 3 signal for the FG signal which seems to be a poor choice, so in a followup video (now uploading) i will substitute the pin 1 signal (a steady dc) for the FG signal so we can compare the FG ramp signal to this pin 3 signal (and the output signal)

Be aware that channel 4 (green) is inverted.  I have corrected that in the follow up video.

Concerning your phenomenon, i guess you are referring to saturation which can cause currents to peak

Video here: https://www.youtube.com/watch?v=i_b18Q3Hueg&feature=youtu.be


WARNING!  i seem to have screwed up the setting on the FG, so i have corrected that in the next video,  sorry about that.


Regards Itsu
   

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If you replace transformer with a coil and remove second diode and all related parts it is just DC-DC boost converter, right?
Yes, it works as a boost converter when the unusual feedback loops are ignored and the L2 circuit is disconnected.
The load LEDs need more than 15V to light and that higher voltage is provided by L1 when VT1 stops conducting (opens)....or during the startup transient.
This simulation illustrates this.
   

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Concerning your phenomenon, i guess you are referring to saturation which can cause currents to peak
Yes, this phenomenon is shown in the video quoted in this message.

If I wanted to make a driver that would automatically operate a transformer at or near the saturation point, I would construct a feedback loop that would react to quickly changing current and a critical level of current.

This is what Acula's feedback loops look for ...BUT their polarity is backwards and not sensing the currents in the transformer windings but in the load bypassed with 10µF and 2000µF caps which effectively attenuate any high frequency signals there.  So that makes no conventional sense.
   

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... while inputting this ramp signal on R5/R7 as mentioned earlier.
It is better to disconnect on side of R7 from R5 and apply the ramp signal to the disconnected side of R7.
In the circuit, the R5 is part of the signal source that you are trying to simulate with the SigGen, so there is no need to have that duplication and a heavy 1Ω load for the weak SigGen's output.

In the video the ramp signal from the SigGen is getting negative (below 0V) and that triggers the 2nd error amplifier (pins 15 & 16) which is set up to detect any signal below zero.
The 2nd error amplifier also affects pin 3 and is interfering with the picture of the 1st amplifier's operation.

WARNING!  i seem to have screwed up the setting on the FG, so i have corrected that in the next video,  sorry about that.
Do you mean this setting?
   

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It is better to disconnect on side of R7 from R5 and apply the ramp signal to the disconnected side of R7.
In the circuit, the R5 is part of the signal source that you are trying to simulate with the SigGen, so there is no need to have that duplication and a 1Ω load for the weak SigGen's output.
Do you mean this setting?

Yes.

R7 and R5 are in series only in my setup, R5 point at ground side is disconnected there and this is where the FG signal is put in.

OK,  second attempt, pins 2, 3, 11 and the FG output monitored.
(Pin 1 has a steady DC which does not change during the video, so i changed it to show the FG output.)


FG set up properly now.

Video shows that the steepness of the ramp signal translate to a signal on pin 3 (feedback) which kind of mutes (set to 0% d.c.) the output signal on pin 11

Video here:   https://www.youtube.com/watch?v=exIFDDgSrng&feature=youtu.be


Regards Itsu

   

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R7 and R5 are in series only in my setup, R5 point at ground side is disconnected there and this is where the FG signal is put in.
What about C5 and C3?  They seem to be disconnected as well because they don't affect the SigGen's output but I have to ask.

OK,  second attempt, pins 2, 3, 11 and the FG output monitored.
FG set up properly now.
Video shows that the steepness of the ramp signal translate to a signal on pin 3 (feedback) which kind of mutes (set to 0% d.c.) the output signal on pin 11
This video illustrates the function of the 1st error amplifier well.
So how steep does the falling edge need to be in order to translate to a signal on pin 3 ?   ...in negative Volts/µs  ;)
Remember, that this steepness sensitivity can be adjusted by the R11 pot. (an ordinary voltmeter is good for monitoring the wiper of R11)
   

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C5 and C3 are not installed in my setup.
basically all right from C13 and R16 is not installed with the exception of R5 (in series with R7) which is installed (but ground point lifted for FG input) and R19 which is NOT installed.

Looking at my scope,

at 85% symmetry there is NO signal on pin 3, and the steepness of the ramp then is 5.4V over 300us = 1V/55us
at 90% symmetry there is a   signal  on pin 3, and the steepness of the ramp then is 5.4V over 200us = 1V/37us

Varying R11 moves this No signal point till minimum 57% symmetry with a steepness of the ramp of 820us at 5.4V =  1v/151us

If thats what you mean   :)

Regards itsu
   

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If thats what you mean   :)
Yes :)
Since it is customary to keep the denominator at unity, I'd rearrange the units to state that the input slew rate needs to be faster than -6.6V/ms to -18V/ms, depending on the setting of R11, in order to activate the 1st error amplifier and limit the output pulse width of the TL494.

What good is that information?
Well for starters it lets us know that if the peak current though those load LED's is e.g. 3A, then the switching frequency of the VT1 transistor has to be
« Last Edit: 2014-03-27, 19:16:21 by verpies »
   

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Well for starters it lets us know that if the peak current though those load LED's is e.g. 3A, then the switching frequency of the VT1 transistor has to be


Is that a question? (did you forgot the ?)
Or do you want to build up the tension  ;D


I have 3W leds on order,  they pull 700mA at 3.5V.   With 10 Leds (5 in series, 2 rows of 5 parallel), it should pull about 1.4A at 15V

Regards Itsu
   

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Dear All.

I have been a bit busy this last couple of days and have now managed to catch up with what has been going on here.

I felt that I needed to extend a note of gratitude and thanks to both Itsu and Verpies for what appears to me, to be an amazing amount of effort and time spent unravelling the control circuit.

It has been wonderful to see members coming together, providing their particular expertise toward a common goal. Heart warming indeed !!

Thank you all.  O0

Cheers Grum.


---------------------------
Nanny state ? Left at the gate !! :)
   
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Salve a Tutti,

Sorry for interfering.

................
That circuit is not mysterious.  The transformer is.  ...its connections to the circuit, too.
................

Precisely, about transformers. To me, the following is new:
I did not know that you could "feed" the primary of a transformer with some sinus or square
voltage via a single wire and get any 'volts out' in a (not loaded, indeed) secondary.
See, for example, case #4 (picture number 3) with square waves.
The basic (but nicely easily operated, no?) Falstad simulator gave me a big nothing. :-X

Please, do not believe that these are just useless volts junk.
Actually, I just figured out -with another experiment-  that I was able to light
a 220 Vols/1 watts Led bulb out of a single wired (not grounded) single (cored) coil.
Yes, this bulb is not fully lighted.

My question could be:
Does a single wire (= not a "'real" 'circuit'"???) consume amps? According to a cheap meter, it does.
Ex: without the Leds: (about) 8 ma. With the Leds: 4 ma. This behavior is not new for me.

Actually, with a very very simple CCT, I'm able (as anybody(?)) to light this kinda (1W to 4W) leds bulbs
with 1.5 volts and 10-80 ma.
Now? Are 20 volts AC-sinus Pk-to PK and 4 ma too much to get about the same result than
with 1.5 Vols-DC/10-20ma???

I do not thrust this cheap meter. Is it able -In the AC-Amp range - to measure things
at about 20 Khz? I have to test this with my (40 Y.old) scope and a one ohm resistor...

Anyway, here are my 3 pictures:










Avec mes salutations les plus cordiales,
Jean
==============================
"Spell Check" out of order ???
   
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