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Author Topic: Magnetic CARA - Proof of Concept  (Read 22751 times)

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I believe that the oscillations are between the inductance and the remaining capacitances in the circuit, like the MOSFET's own capacitance and the parasitic capacitance of the wiring.
That does not compute because the period of these oscillations is 240μs.
If the inductance of the coil is 110mH then the capacitance to make this oscillation in an LC circuit would have to be 13nF.  ( using the formula C=1/4Lπ2f2 )
I don't think we can get that much from the parasitic capacitance of the wiring and the output capacitance of an open MOSFET (200pF according to datasheet).

The energy comes from the turn-off spike (which comes from the input energy in the first place) and it is the _same_ energy being sloshed back and forth between inductance and capacitance.
...but this electric energy is conducted by D1 and is used up to charge C2.  
Once C2 becomes charged during the first ¼ of the cycle, it cannot give the energy back to L1 because D1 prevents it. ..so no bidirectional "sloshing" is possible between C2 and L1.  ...yet we have 10 peaks visible on the scopeshot  :o

That is, each separate spike represents the same bit of energy, not new energy, and it is dissipating at a rate that results in the decreasing amplitude of the spikes over time. A little of the energy is lost in heat and radiation with every "slosh" so the spikes decrease.
That does not match well the known resistances in the circuit (10Ω) because the rate of decay of these oscillations is 50%/2ms and to get such decay we would need to have 76Ω of resistance in the circuit.  ...but these oscillations are not sinusoidal so who knows.  

Note, that the green waveform appears to have a triangular shape!  (@Itsu: please magnify it, before you alter the circuit, so we can be sure of that).

Also, these oscillations and reversals of current flowing through R1 are even more unexpected than if we had such current waveform flowing through L1.
This is because R1's current can be related only to Q1's Drain current, while L1's current can be independent from the Drain current (flowing through C2).

The current reversals show the direction of the "slosh": from inductance to capacitance, or the other way around.
Which capacitance did you have in mind?  C2 or the MOSFET's effective output capacitance ( CO(tr) ) + wiring's stray capacitance (CS) ?
If "C2" then the energy can "slosh" only once in one direction because of D1.
If "CO(tr) + CS", then I don't think they can make up the 13nF needed to support the 4kHz oscillation.

The voltage of the sloshing is clipped on the bottom by the diode blocking so the sensed voltage at the probe doesn't go below the zero baseline.
Which diode did you have in mind?  D1 or the MOSFET's body diode ?

You might compare the case with the diode shorted by a short jumper and see if the drain voltage trace ringdown gets more symmetrical around the zero baseline.
Yes, I also think that we are at a point where the circuit needs to be variously altered in order to see how these oscillations will respond.
« Last Edit: 2015-02-14, 16:52:30 by verpies »
   

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The ucc37321 MOSFET drivers "R sink/source" gate resistor used is 10 Ohm.
Oh!, this is a different driver that does not have separate sink and source resistors :(
Change the common gate resistor to 3.3Ω anyway and see if these pesky oscillations change with it.
   

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Finally for tonight, I changed the MOSFET for a IPI90R500C3  (900V, 24A pulsed, Rdson 0.5 Ohm)
which should be able to handle the 500V pulses see screenshot (30V on the drain, @ 500Hz (2ms) pulse)
Was this scopeshot made with the C2 discharged apriori ?
   

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Was this scopeshot made with the C2 discharged apriori ?

No,  very probably not as i seldom discharge C2 during these tests (i will have to manually discharge every 2 seconds).


Itsu   
   

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No,  very probably not as i seldom discharge C2 during these tests (i will have to manually discharge every 2 seconds).
If you don't do this then C2 becomes irrelevant in the circuit because it absorbs the switch-off spike from L1 most efficiently when it is fully discharged.

If this is too inconvenient, we can design some automatic discharge circuit, that will discharge C2 right before Q1 closes.


P.S.
Yes, we could design some automatic discharge circuit, that would discharge C2 right before Q1 opens, but that would be more difficult due to the race condition and much shorter margin for error..
   

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If you don't do this then C2 becomes irrelevant in the circuit because it absorbs the switch-off spike from L1 most efficiently when it is fully discharged.

If this is too inconvenient, we can design some automatic discharge circuit, that will discharge C2 right before Q1 closes.


P.S.
Yes, we could design some automatic discharge circuit, that would discharge C2 right before Q1 opens, but that would be more difficult due to the race condition and much shorter margin for error..


Ok,  i can discharge C2 always before manually activating S0, that should be no problem for now.



For the rest i have these requests / alterations pending for tonight:


# verify that you have not made a bad connection somewhere (verify the circuit)
# Note, that the green waveform appears to have a triangular shape! (@Itsu: please magnify it, before you alter the circuit, so we can be sure of that).
# Change the common gate resistor to 3.3Ω anyway and see if these pesky oscillations change with it.
# discharge C2 right before Q1 closes.
# remove C2 and see if these oscillations go away.
# remove D1 and anything else that makes sense...
# insert a diode between L1 and the Drain of Q1 (cathode to drain).

Regards Itsu

   

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OK,  did some easy tests:


# verify that you have not made a bad connection somewhere (verify the circuit)
  i cannot see any mistakes

# Note, that the green waveform appears to have a triangular shape! (@Itsu: please magnify it, before you alter the circuit, so we can be sure of that).
  Yes, looks like it,  see screenshot 1

# discharge C2 right before Q1 closes.
  i did that will all tests and from now on , see screenshot 2 for a base line screenshot for the rest of the tests (current controller set to 20mA/Div. for all)  pulse was 400Hz (2.5ms) also for all (as i use 50% Duty Cycle, it really is half)
  
# remove C2 and see if these oscillations go away.
  i used the S1 switch (across C2) to shorten C2 (so removed), see screenshot 3

# remove D1 and anything else that makes sense...
  i shorted D1 (so removed), see screenshot 4

These 2 other changes will have to wait to later this evening.
But looks like that C2 is causing these oscillations

# insert a diode between L1 and the Drain of Q1 (cathode to drain).
# Change the common gate resistor to 3.3Ω anyway and see if these pesky oscillations change with it.

EDITED...  i removed C2 completely from the circuit, see screenshot 5 (so we have an L1/D1 parallel circuit)


Regards Itsu
« Last Edit: 2015-02-13, 20:29:28 by Itsu »
   

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Here some screenshots with L1 only (both C2 and D1 removed), drain voltage lowered to 15V


Regards Itsu
   

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These 2 other changes will have to wait to later this evening.
But looks like that C2 is causing these oscillations

# insert a diode between L1 and the Drain of Q1 (cathode to drain).
# Change the common gate resistor to 3.3Ω anyway and see if these pesky oscillations change with it.
As you can see, similar oscillations are also present without the entire C2 subcircuit, ...albeit with lower frequency and amplitude. (compare the purple trace here vs. here)
So it looks more and more like a Miller oscillation in Q1, so unfortunately these last 2 changes will need to be made to verify it.
   

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As you can see, similar oscillations are also present without the C2 subcircuit, ...albeit lower frequency and amplitude.
So it looks more and more like a Miller oscillation in Q1, so unfortunately these last 2 changes will need to be made to verify it.

Ok,    common gate resistor to 3.3Ω, see screenshot 1.   Drain voltage back to 30V, pulse 1.25ms , current controller set to 20mA/Div.
Rest of the circuit in place (C2, D1, L1 etc.).


Latest point:  # insert a diode between L1 and the Drain of Q1 (cathode to drain).  see screenshot 2
(Diode (also IDH12SG60C) close to L1, Cathode to Drain, see diagram)


Itsu
   

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Ok,    common gate resistor to 3.3Ω, see screenshot 1.   Drain voltage back to 30V, pulse 1.25ms , current controller set to 20mA/Div.
Rest of the circuit in place (C2, D1, L1 etc.).
Well, there is a small difference in oscillation between this and this scopeshot.  The oscillation amplitude has slightly increased with the 3.3Ω gate resistor.  
I don't know if this difference is significant. Was the supply voltage the same (30V) when both of these scopeshots were taken?

Latest point:  # insert a diode between L1 and the Drain of Q1 (cathode to drain).  see screenshot 2
(Diode (also IDH12SG60C) close to L1, Cathode to Drain, see diagram)
I did not realize that my textual description was ambiguous and could be interpreted in two ways  :(   Sorry.
I had this position of D2 in mind and the purple probe still on the Drain (point D) :
« Last Edit: 2015-02-13, 23:06:04 by verpies »
   

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Well, there is a small difference in oscillation between this and this scopeshot.  The oscillation amplitude has slightly increased with the 3.3Ω gate resistor.  
I don't know if this difference is significant. Was the supply voltage the same (30V) when both of these scopeshots were taken?

Yes

Quote
I did not realize that my textual description was ambiguous and could be interpreted in two ways  :(   Sorry.
I had this position of D2 in mind and the purple probe still on the Drain (point D) :

No problem,  its my ignorance  :-[ ,     here the screenshot of that D2 situation, pulse 1.25ms, drain voltage 30V, controller set to 20mA/Div.

Should i try with a UCC27511 MOSFET driver instead, using separate sink/source resistors (like in the drawing)?

Regards Itsu
   

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Should it try with a UCC27511 MOSFET driver instead, using separate sink/source resistors (like in the drawing)?
I don't think it will solve the problem of these oscillations.  You may try it if you have it, but don't bother ordering it - if you don't.

Anyway, these oscillations have a more sinusoidal shape now.
Could you try removing the C2 subcircuit again, while keeping the D2 in its current place?
   

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I don't think it will solve the problem of these oscillations.  You may try it if you have it, but don't bother ordering it - if you don't.

Anyway, these oscillations have a more sinusoidal shape now.
Could you try removing the C2 subcircuit again, while keeping the D2 in its current place?

Ok,  without C2:


Itsu
   

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Ok,  without C2:
The entire C2 subcircuit is removed ? ...including D1 ?
I am asking because I don's see a voltage spike on the drain (purple).
   

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The entire C2 subcircuit is removed ? ...including D1 ?
I am asking because I don's see a voltage spike on the drain (purple).


Oeps,  no only C2.

Ok,  now both are out (C2 and D1), D2 still in.    Current controller set to 5A/Div.!!   See screenshot 1

Screenshot 2 are the enlarged signals at MOSFET closing time.

Itsu
   

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Ok,  now both are out (C2 and D1), D2 still in.    Current controller set to 5A/Div.!!
WTF ?!!!
Negative current ramp through R1  :o   Did you accidentally short the entire C2+D1 branch?

Is that current waveform still visible when you measure galvanically across R1 ?
   

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Yes, looks like it, FG isolated, yellow probe across 0.1 Ohm resistor next to the current probe:

Itsu
   

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Did you accidentally short the entire C2+D1 branch?
Yes, looks like it,
Don't short that branch - open it instead.

BTW: A nice clean yellow current trace.  Wrong slope direction ...but clean nonetheless 8)
   

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Ok,  open now   L1 only:

Itsu

   

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Open now,   L1 only:
The oscillation period has decreased to 63µs and the oscillation resembles a sine wave.  Now only 1nF of stray capacitance is sufficient to explain that 16kHz oscillation for a 110mH coil.
This is the scenario that TK was writing about.  Let's not do this again, almost 1kV drain spikes, Ouch!

Reinstall the C2 + D1 branch and increase C2 to at least 1µF (300V rating is sufficient if the current through L1 (iMAX) stays below 1 Amp when Q1 opens...and only 100V rating if you use a 10µF cap, 30V if you use a 100µF cap, etc...).  
Use the formula VMAX = iMAX*SQRT(L1 / C2) to calculate voltage ratings for other capacitances of C2.

When Q1 opens, we must transfer ALL of the energy stored in L1 into C2 ...and we must do it in the first ¼ of the L1C2 cycle.  
A larger C2 should soak up all of the energy in L1 more efficiently and not leave any energy behind for further oscillations.
« Last Edit: 2015-02-14, 17:03:42 by verpies »
   

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D2 removed, D1/C2 back in, C2 is 20uF/400V (PIO), 30V on Drain, 1ms pulse (C1 still 1.8uF), C2 discharged before pulse. see screenshot 1.

Screenshot 2 is the same, but with C2 = 40uF


Regards Itsu
   

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Now 20µF C2 takes a looong time (7mS) to soak up the energy from L1.  This is not good because this energy transfer time should be much shorter than the gate pulse width.  Do you have a 1µF or 2µF cap of a sufficient voltage rating?  You should also increase C1 to a 20µF - 100µF cap with 30V-50V rating, irrespectively.

Anyway, how does the voltage across C2 look now in relation to current flowing through R1 ?  ( isolated inverse scoping between points A-B and A-C )
Also, it would be interesting to see what the green current probe senses on the L1 lead between point B and L1.
« Last Edit: 2015-02-14, 21:17:36 by verpies »
   

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Quote
Now 20µF C2 takes a looong time (5mS) to soak up the energy from L1.  This is not good because this energy transfer time should be much shorter than
the gate pulse width. 
Do you have a 1µF or 2µF cap of a sufficient voltage rating?  You should increase C1 to a 20µF - 100µF cap with 30V-50V rating, irrespectively.

I have some MOT caps of that value (1.2uF), they do have a 10M Ohm bleeder across

Quote
Anyway, how does the voltage across C2 look now in relation to current flowing through R1 ?  ( isolated inverse scoping between points A-B and A-C )

See screenshot 1,  blue is A to C, yellow A to B, green is the current probe at the csr.  Hard to trigger, no current seen.

Quote
Also, it would be interesting to see what the green current probe senses on the L1 lead between point B and L1.


See screenshot 2, same setting as 1, but green current probe now between B - L1   

Itsu
   

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Same set of measurements, but now with 2x 2.2uF/400V caps in series (1.1uF)  as C2,  no bleeder across:

Itsu
   
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