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Author Topic: Itsu's workbench / placeholder.  (Read 107803 times)
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Neslon
Quote
First of all I want to say that I will be as direct as possible in my answer face to your approach in your last posts, where I sincerely  felt some hostility and cynicism by your side just because I expressed my doubts about the reliability of LTspice in certain situations .

I would agree and a simulation is not reality. I told many in the past that a sim will not show the real process unless they actually understand the process before hand which they do not.

As well, a simple line based flow diagram cannot simulate a geometry dependent process acting within a three dimensional space because the most important variables are missing.

I used to use many electronics sims as well as Solidworks Flow cfd simulators however to honest it was mostly wasted time in retrospect. It was easier to just build the real thing on a manageable scale and learn the concepts in reality.

Regards


---------------------------
Comprehend and Copy Nature... Viktor Schauberger

“The first principle is that you must not fool yourself and you are the easiest person to fool.”― Richard P. Feynman
   

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First of all I want to say that I will be as direct as possible in my answer face to your approach in your last posts, where I sincerely  felt some hostility and cynicism by your side just because I expressed my doubts about the reliability of LTspice in certain situations .

When I ask you  some considerations regarding the values obtained during the transient simulation on this specific diagram I was not considering the profound changes you made to the original circuit but try to understand the actual circuit .
The idea would be to justify and interpret the result of the original circuit, but after the changes you made, what can I say? I had the same doubts that I had previously.

This diagram was initially designed by Itsu, and later modified by me to try to recreate a specific real life circuit that we suspect have some sort of negative resistance in their operation, but apparently, you didn't even give the opportunity to check that, face your question at the end of the post,where you ask what is the specific function of this circuit.

Some of the changes you have made, namely in the configuration of V2 pulse time , T Rise and T fall , period  , completely change the behavior of the simulated circuit, but you should know that better than me, because it was you that  conveniently change the values. Period value of 1second ??   SW is supposed to simulate a action of a simple push button , My question is why you made that changes? What is the point of change that values  ?

About C7 capacitor, the one you change from original position to parallel with L3 You justified that if you do not change the position of C7 the oscillation would die at 400ms , but on the real circuit, it doesn't stop …  And one of the main points, would be exactly to understand why in the simulation in LTspice, he stops at 400ms, but you discover  the problem was C7 capacitor...   Should I change the original real circuit according to your simulation to you believe yourself that Ltspice is extremely accurate?  Seem is not, but I understand, to you is now properly configured.

I don't think I have anything else to add to my answer
Many thanks.

Best rewards


Hi Nelson,

being direct is fine, i try to do the same myself, but for me, i do not share the felt hostility and cynisme in Partzman his post.

Please always stay aware that we all are different and thus expressing ourself differently and then there is the language barrier.

Partzman did in my opinion a good job in analyzing the circuit and why it stops, and tried to make it run by doing some modifications.

I do agree that that was not what you had asked for and thereby he changed the circuit in such a way that it is not the same circuit, but hey, that was probably his drive at that moment, make it run.
Also he could have read up on the reason why we are replicating (real and sim) this specific circuit as it shows some (in my opinion) fascinating effect (brighter output bulb then input bulb).

There are already severall posts from verpies and lost_bro saying that a sim is fine for electronics, but lacks some typical physics behaviour which very well could be involved here.

Anyway, we all here are doing our "thing" to assist in unraveling this special effect you show in your video's

Lets stay focussed and take the nuggets we can use and ignore the ones that are not relevant.

Thanks Itsu
« Last Edit: 2020-05-02, 10:20:34 by Itsu »
   

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Hi Itsu,

The first 4 pictures are on Digikey or are on similar to Digikey CMCs and the last 3 pictures are that of Nelson's.
so if you mean this https://www.overunityresearch.com/index.php?action=dlattach;topic=3691.0;attach=34880 it is from Digikey.

I attached Nelson's photo on his transformer, no ferrite core bridge is seen at its bottom part, the C core is on the top part and the I core is in the middle, inside the bobbin.

Gyula

Hi Gyula,

Yes, i was referring to MY CMC (see picture below) which i thought looked the same as in the 1.jpg picture in post #502 from Nelson.

MY CMC has the same layout as what Nelson showed in his PIT transformer (2x E-core), so no need for me to make one using my large E-cores as i already have small ones which i can modify (rewind with thinner wire).

But they are still not the same as what Nelson is using in his circuit as that is, like you showed above, a C- and I-core, so not a double e-core.

Itsu 
   

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I found data sheets on Epson Power line chokes, may be useful, includes stray inductances.

Good find Gyula,  those look more like the one Nelson has.

But the 15mH one has 2.4 ohm resistance, so much more then the measured 0.6 ohm.

Could it be that Nelson his CMC is running near or at resonance?
The ones shown here do that at severall hundreds of Khz, not really the frequency we run at.

Itsu
« Last Edit: 2020-05-02, 11:42:34 by Itsu »
   
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First of all I want to say that I will be as direct as possible in my answer face to your approach in your last posts, where I sincerely  felt some hostility and cynicism by your side just because I expressed my doubts about the reliability of LTspice in certain situations .

When I ask you  some considerations regarding the values obtained during the transient simulation on this specific diagram I was not considering the profound changes you made to the original circuit but try to understand the actual circuit .
The idea would be to justify and interpret the result of the original circuit, but after the changes you made, what can I say? I had the same doubts that I had previously.

This diagram was initially designed by Itsu, and later modified by me to try to recreate a specific real life circuit that we suspect have some sort of negative resistance in their operation, but apparently, you didn't even give the opportunity to check that, face your question at the end of the post,where you ask what is the specific function of this circuit.

Some of the changes you have made, namely in the configuration of V2 pulse time , T Rise and T fall , period  , completely change the behavior of the simulated circuit, but you should know that better than me, because it was you that  conveniently change the values. Period value of 1second ??   SW is supposed to simulate a action of a simple push button , My question is why you made that changes? What is the point of change that values  ?

About C7 capacitor, the one you change from original position to parallel with L3 You justified that if you do not change the position of C7 the oscillation would die at 400ms , but on the real circuit, it doesn't stop …  And one of the main points, would be exactly to understand why in the simulation in LTspice, he stops at 400ms, but you discover  the problem was C7 capacitor...   Should I change the original real circuit according to your simulation to you believe yourself that Ltspice is extremely accurate?  Seem is not, but I understand, to you is now properly configured.

I don't think I have anything else to add to my answer
Many thanks.

Best rewards

Hi Nelson,

My impression is that Partzman did not mean cynicism and hostility towards you in his latest posts here. I know that he has been using LTspice for several years now, he included many screenshots on waveforms and circuits in his posts both here at his bench thread and at overunity.com in different threads. What I sense from him is a helping intention to rectify our (me and Itsu) lack of expertize in using LTspice.  Regarding his question at the end of his post: I assume he did not wade through the long pages of the this thread and did not read what Itsu clearly wrote that you did not claim ou with this circuit. Maybe he has not watched your 3 videos on this circuit either. 

Regarding rise and fall time for a pulse generator in LTspice, I found this explanation at this site,

" Trise is the rise time of the pulse. LTspice allows this value to be zero, but zero rise time may cause convergence problems in some transient analysis simulations. "

see here:  http://denethor.wlu.ca/ltspice/#vpulse 

I think Partzman wanted to avoid possible convergence problems in the simulation and changed the zero rise and fall times that were included in the ultimo-funcional.asc sim file.   I did not know about the convergence problems until now. 
You surely know that zero rise and fall times are impossible to achieve in practice, the best values I think are in the picosecond range.

Regarding the 1 second long period value for the pulse generator I think it was chosen on purpose to last exactly till the 1 second long transient analysis time,  I cannot see any wrong with this.  Maybe you see this differently which is fine but then let's discuss this if you wish.

Nelson, I am also as direct as possible and I am not defending Partzman against you, please understand this. We need to be as objective as possible and include as small subjectivism as possible.

I remain open to analyse further this oscillator circuit and I suggest this to all of us. We need to bear with each other to proceed.   O0

Regards
Gyula
   
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First of all I want to say that I will be as direct as possible in my answer face to your approach in your last posts, where I sincerely  felt some hostility and cynicism by your side just because I expressed my doubts about the reliability of LTspice in certain situations .

Nelson, I'm sorry if I came across as hostile because that was not my intent and I was certainly not considering any negative comments about LtSpice.  Oh I defend the program all right but it is from due respect of the software's ability and it's author. 

Quote
When I ask you  some considerations regarding the values obtained during the transient simulation on this specific diagram I was not considering the profound changes you made to the original circuit but try to understand the actual circuit .
The idea would be to justify and interpret the result of the original circuit, but after the changes you made, what can I say? I had the same doubts that I had previously.

I again apologize for making changes to your circuit but I've been a circuit designer for over 50 years so I took some liberties based on experience.

Quote
This diagram was initially designed by Itsu, and later modified by me to try to recreate a specific real life circuit that we suspect have some sort of negative resistance in their operation, but apparently, you didn't even give the opportunity to check that, face your question at the end of the post,where you ask what is the specific function of this circuit.

So, the answer to my question is, the circuit is to basically perform as a negative resistance oscillator.  That is basically what I wanted to know.

Quote
Some of the changes you have made, namely in the configuration of V2 pulse time , T Rise and T fall , period  , completely change the behavior of the simulated circuit, but you should know that better than me, because it was you that  conveniently change the values. Period value of 1second ??   SW is supposed to simulate a action of a simple push button , My question is why you made that changes? What is the point of change that values  ?

Well, the circuit will not self start without S1 due to the fact that the emitter-base junction of Q1 is shunted by R1 and with no other bias means to the base of Q1, the circuit will not oscillate.  So, I configured S1 to turn on for 1ms with a delay of 1us after the sim start to pre-charge C4 which will then provide enough base current for the oscillation to start.  I used definite rise and fall time values so LtSpice would not supply default values.

The 1s period for S1 could be anything >1ms and not affect the circuit operation because only 1 cycle is selected. 

So, IMO the changes I made to S1 have no material affect on the circuit's operation except at start up.  This should be of no concern unless one is expecting any OU behavior during this time. 

Using S1 is not the best method to start this circuit as is evidenced by the large collector current of Q1 which is why I start the plot log with a 4ms delay so these transients don't set the current auto scaling so high that the normal run currents can't be seen properly on the plot. 
 
Quote
About C7 capacitor, the one you change from original position to parallel with L3 You justified that if you do not change the position of C7 the oscillation would die at 400ms , but on the real circuit, it doesn't stop …  And one of the main points, would be exactly to understand why in the simulation in LTspice, he stops at 400ms, but you discover  the problem was C7 capacitor...   Should I change the original real circuit according to your simulation to you believe yourself that Ltspice is extremely accurate?  Seem is not, but I understand, to you is now properly configured.

The reason oscillation stops at ~400ms is due to the fact that the base of Q1 diminishes over time to the point of being unable to turn Q1 back on.  I honestly see no earthly reason for C7 to parallel D4 whether it is the original running circuit or not.  D4 would simply look like a leaky diode in the reverse direction but perhaps I'm missing something here.

Placing C7 in parallel with L3 provides resonance with the leakage inductance of L2/L3 and with the rest of the circuit configuration prevents the diminishing base current of Q1.  One of the reasons that Q1's base current diminishes with C7 in it's original position is due to the discharge of L1 into the base which drives the base-collector junction into forward bias and raises the voltage at VC4h to ~40v peak during this time.

A possible solution would be to increase the beta or HFE of Q1 as it is listed with a BF=16.28 in the  file!?!  This can be done using an undocumented command called AKO or "A Kind Of".  This can be found with syntax at-

http://ltwiki.org/?title=Undocumented_LTspice

Regards,
Pm

Edit: The above AKO works with LtSpice IV but not sure about XVII.  Due to quirks with XVII, I only use IV.

Quote
I don't think I have anything else to add to my answer
Many thanks.

Best rewards

   
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   Hey guys:
   I think that Nelson is right about replicating his circuit as exact as possible. Which may not be that easy to do, finding old Tv chokes, and all.
   Here is what I came up with from my junk pile, perhaps one of them can be wound with the right gauge wire, and number of turns, etz...
   Maybe forget about the simulations, and focus on replication? For now.
   
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....

Could it be that Nelson his CMC is running near or at resonance?

The ones shown here do that at severall hundreds of Khz, not really the frequency we run at.

Itsu

Hi Itsu,

Well, the L2 coil part of the 1:1 transformer is embedded into capacitor "enviroment" anyway, which may create near resonance conditions but now that we know all the capacitor and coil values, my simulations have not shown resonant conditions. This would mean a sinosoidal or nearly sinosoidal waveform across L2 and / or  L3 but I got a distorted sinewave across L2 and distorted square wave like waveform across L3.

The data sheet I uploaded shows CM chokes for power line filtering, they attenuate unwanted signals coming back from switch mode power supply circuits that are fed from the mains. So the test frequencies of some ten to 100 kHz range for these chokes cover the operating frequencies of those circuits.  They can opeate in the 10 -20 kHz range too of course.
It is unfortunate that such off:the_shelf choke with 10 mH inductance has rather high, 1.75 Ohm DC resistance, they did not use thicker wire for their windings, that is all.

Gyula
   
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FWIW, the reason the simulation stops at ~400ms with the original circuit is that the load on the secondary L3 diminishes as C8 charges until it reaches a voltage nearing the supply voltage.  This reduced load is reflected to L2 and thus reduces the charge on C4 which in turn reduces the base current in Q1.  By simply shorting across C8, the sim will run continuously with considerable ripple across E2.  Changing C6 to 400uf yields a smooth dc output across E2 and various measurements can then be taken.

Since simulation appears to no longer be important or needed, I'll go back to my other work.

Regards,
Pm
   
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   That's not what I meant. I understand the logic in the low base current stopping the oscillations, but won't changing the specs to obtain a clean signal, and oscillation not going to affect things, a bit.
   
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   That's not what I meant. I understand the logic in the low base current stopping the oscillations, but won't changing the specs to obtain a clean signal, and oscillation not going to affect things, a bit.

Nick,

Well yes it will so I guess I have misunderstood this whole exercise.  I thought the idea was to find the reason the sim stopped functioning when someone's actual bench circuit did not.  I will have to go back thru the thread to see who actually built the circuit and if there was documentation showing anything about the performance, etc.

I thought that since this was an OU forum that there was a possibility this circuit exhibited OU but I guess I'm wrong in that assumption so for that I apologize!

Regards,
Pm
   

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   Hey guys:
   I think that Nelson is right about replicating his circuit as exact as possible. Which may not be that easy to do, finding old Tv chokes, and all.
   Here is what I came up with from my junk pile, perhaps one of them can be wound with the right gauge wire, and number of turns, etz...
   Maybe forget about the simulations, and focus on replication? For now.

Nick,

My real life replication and sim are in accordance with each other concerning the general outcome that is a low output power compared to the input power.
There are minor differences in signal shapes and amplitudes, but they overall match, so i see no reason to only focus on replication.
I can quickly change something in the sim to see what effect it has before changing my replication.

Itsu
   

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Hi Itsu,

Well, the L2 coil part of the 1:1 transformer is embedded into capacitor "enviroment" anyway, which may create near resonance conditions but now that we know all the capacitor and coil values, my simulations have not shown resonant conditions. This would mean a sinosoidal or nearly sinosoidal waveform across L2 and / or  L3 but I got a distorted sinewave across L2 and distorted square wave like waveform across L3.

The data sheet I uploaded shows CM chokes for power line filtering, they attenuate unwanted signals coming back from switch mode power supply circuits that are fed from the mains. So the test frequencies of some ten to 100 kHz range for these chokes cover the operating frequencies of those circuits.  They can opeate in the 10 -20 kHz range too of course.
It is unfortunate that such off:the_shelf choke with 10 mH inductance has rather high, 1.75 Ohm DC resistance, they did not use thicker wire for their windings, that is all.

Gyula


Gyula,

yes, i tried to manipulate the caps around L2/L3 to get them into resonance, but this means to deviate from the value's given by Nelson.

I found a CMC close to your Epson types with 2x u-cores and 2 double coils measuring 2x 43mH.
I have removed the outer coils and adjusted them to be 2x 13mH @ 0.2 Ohm.

But initial tests shows same behaviour as last tests using Nelson his cap value's.
High output voltage (340V), but when shorting about 5mA through E2 while input goes from 31mA to 18mA.

Itsu
   

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Nick,

Well yes it will so I guess I have misunderstood this whole exercise.  I thought the idea was to find the reason the sim stopped functioning when someone's actual bench circuit did not.  I will have to go back thru the thread to see who actually built the circuit and if there was documentation showing anything about the performance, etc.

I thought that since this was an OU forum that there was a possibility this circuit exhibited OU but I guess I'm wrong in that assumption so for that I apologize!

Regards,
Pm

Partzman,

we very much appreciate your stepping in in trying to understand why the sim does what it does.
Especially that the reduced output load is reflected back to L2 causing the oscillation to stop and how to circumvent this.


But we (Nelson) have a circuit that is made out of certain fixed components which shows via bulbs (identical bulbs, 1 in the input lead, another in the output lead) that more current is flowing through
the output bulb then in the input bulb when shorting the output.

So the sim needs to be following these fixed components to be of any value.

No OU is claimed as no proper measurements have been done due to lack of equipment.

So therefor my real life replication in trying to mimic this "more current through the output bulb then through the input bulb when shorted".

Up till now my real life replication does not show the effect (which could be negative resistance), so that is what we are looking for, also using the Sim.

Regards Itsu
   
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Gyula,

yes, i tried to manipulate the caps around L2/L3 to get them into resonance, but this means to deviate from the value's given by Nelson.

I found a CMC close to your Epson types with 2x u-cores and 2 double coils measuring 2x 43mH.
I have removed the outer coils and adjusted them to be 2x 13mH @ 0.2 Ohm.

But initial tests shows same behaviour as last tests using Nelson his cap value's.
High output voltage (340V), but when shorting about 5mA through E2 while input goes from 31mA to 18mA.

Itsu

Hi Itsu,

Thanks for making another CMC choke.  Even though it looks good with the two facing C cores, it is bad it behaves as the earlier choke. 

Hopefully Nelson can borrow the LCR meter again from his friend and will return with his measurements on his CMC what Partzman suggested in his post # 508.

You may also wish to do that on your new CMC.   

This way your replication may get closer to Nelson's oscillator. 

Thanks
Gyula
   

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Thanks Gyula,    yes i can do that tomorrow.

By the way, the oscillation frequency on my real life replication is now around 20khz which is close to Nelson his 19Khz.





Hmmm,   when taking Partzman suggestion and shorting c8, it indeed now runs on, but it seems that more current/power is running through/in E2 then in E1.........



Itsu
   
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   Thanks for your explanation, and going through what you've just tested. That is really a step forward, at least to know why the sim circuit stops, and what can be done about it.
Looks like itsu just gave a nice explanation on the goals with this circuit. And how the simulations are similar to his actual tests. So, it looks like we have to wait and see what the right transistor is going to do, when itsu gets it.  I know how tricky using different transistors, coils, caps, and all can be, to try and replicate a delicate anomaly, like this.
   Good luck with that, to all following along.
   NickZ
   

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Nick,
What are you doing here?

Has the censorship at Stefan's place gotten so bad ?
   

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   PM:
   Thanks for your explanation, and going through what you've just tested. That is really a step forward, at least to know why the sim circuit stops, and what can be done about it.
Looks like itsu just gave a nice explanation on the goals with this circuit. And how the simulations are similar to his actual tests. So, it looks like we have to wait and see what the right transistor is going to do, when itsu gets it.  I know how tricky using different transistors, coils, caps, and all can be, to try and replicate a delicate anomaly, like this.
   Good luck with that, to all following along.
   NickZ

Nick,

i received he correct transisor 4 days ago, see post #492 2 pages back:
https://www.overunityresearch.com/index.php?topic=3691.msg81493#msg81493


Anyway, at least my sim shows the special effect of Nelson his circuit, so hopefully at others it behaves the same and we can analyze how that comes and how to replicate in real life.

Itsu
   
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Hi Itsu,

I find similar behaviour like you when the E2 bulb is directly across the output (i.e. the output is shorted).  I attached first the unshorted and then the shorted simulation results for the currents and power levels in the bulbs E1 and E2. 

I had the simulator calculate the average input power too which was 506.43 mW (Integral 25.32 mJ)  in the unshorted and
it was  501.43 mW (Integral 25.08 mJ)  in the shorted case, just to learn about the input power levels too. 

Out of curiosity, I repeated this same for the circuit file Partzman uploaded and it also shows similar behavior. 

Gyula
   

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Thanks for confirmation Gyula.

But in the unshorted version, it still stops at 400ms,  right?



So what does this say about the Nelson circuit, does it mean that what Nelson showed can be simulated?
If so, then it must be electronically explainable.

Itsu
   

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The special or unique CMC that you've shown can be profiled in the following manner so it can be replicated or simulated by others with reasonable accuracy.

First, measure the inductance of each winding which in this case they will be close to the same.  This can be done at a low level with an inductance meter or with a high level from a switching circuit that will allow one to measure L = E*dt/di .  This last measurement will also allow one to check to see if the core is not saturating at the required operating mmf or coil current.

Next, take inductance measurements of the two coils connected in series aiding L+ and series bucking L-.  The L- or bucking measurement will be lower than the L+ or aiding.  Then using the formula M = ((L+)-(L-))/4 we now have the mutual inductance.

Using the mutual inductance we can now calculate the k or coupling factor with k = M/(Lp*Ls)^.5 but since Lp = Ls we can use k = M/Lp .

With this info, the transformer can now be built or simulated with the additional info on dc resistance.  There will a slight inter-turn capacitance and very little inter-winding capacitance due to the split bobbin design so both can be ignored without much error..

As a check, we can calculate the leakage inductance with Lpleak = (1-k)*Lp and the primary inductance with the secondary shorted with Lpss = (1-K^2)*Lp .

I might add that most CMCs have a slight gap in the ferrite cores to help prevent saturation at higher current levels.

Regards,
Pm

Using again Partzman above calculations for the coupling factor etc. on my newly build 13mH CMC i get:

measured @ 10Khz

Lp = 12.3mH
Ls = 12.3mH
L+ = 48.5mH
L- = 57uH

M = 48.44/4 = 12.11mH
K = 12.11/12.3 = 0.98

Lpleak = 0.246mH
Lpss = 0.49mH

Edit,  i used a measured 227nF cap to get resonance for:

Lpleak (sec. paralleled with cap) at 7.4MHz.
Lpss (prim in series with cap, sec shorted) at 6.65MHz.

Not sure now how to calculate the Lpleak and Lpss from this.
when using this resonance calculator http://www.1728.org/resfreq.htm  i get:

Lpleak = 0.0020uH
Lpss = 0.0025uH

which seems very low.

Itsu
« Last Edit: 2020-05-03, 17:19:04 by Itsu »
   
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Buy me a drink


Partzman,

First of all my apologies for my late reply, however someone who was dear and close to me, died yesterday from this evil plague , and I feel quite low right now, but
i would like to answer some of your points, even if we have a different opinion.

“Nelson, I'm sorry if I came across as hostile because that was not my intent and I was certainly not considering any negative comments about LtSpice.Oh I defend the program all right but it is from due respect of the software's ability and it's author.”

I have nothing against the fact that you defend the LTspice program, or its author.
Myself wanted to learn to work with Ltspice and I start motivated by Itsu and Gyula because I recognize qualities in it, but without agreeing that it can be used in all situation, like in Aetheric situations by your own words .
I guess we are not really dealing with etheric issues in this Forum , even more when it comes to the Overunity Research forum.
We better leave aside the "unicorns" and fairy tales aside, and be objective in the real purpose that connects us to all who dedicate their time to research in this area of OU.

“I again apologize for making changes to your circuit but I've been a circuit designer for over 50 years so I took some liberties based on experience.”

“IMO the changes I made to S1 have no material affect on the circuit's operation except at start up. This should be of no concern unless one is expecting any OU behavior during this time.”

I know you have a long experience in simulating LTspice, I really appreciate your work that I follow over the years as well as other distinguished users , and I am sure that the changes you made will have the best intention, but in my opinion, some of these changes don't seem to fit the circuit that we are work and try understand.
I'll give you an example:
SW, it would be supposed to recreate a push button, giving only one pulse for the oscillator to start, and nothing more, however you can verify that the SW of your diagram, creates multiple pulses throughout the simulation, when it was supposed to be just one pulse .Am i wrong about my interpretation?
Try to take a sample in SW in your diagram and mine and you will be able to understand what I mean because the difference is evident.
This interferes too in some way in the behavior of C5 in the circuit, both in LTspice and in the real life circuit.


“I will have to go back thru the thread to see who actually built the circuit and if there was documentation showing anything about the performance, etc.”

The only documentation related to the circuit is the one that has already been made available some posts ago, and as you have already been told, no claim has been made. By knowing the behavior of some elements of this forum or in  OU, myself  anticipated it;) because it was expected that this would happen.
I have learned over the last years that even the apparently most evident manifestations of possible OU, can sometimes be a trap either for those who make the claims, or for those who challenge them to probe the opposite.
And I can assure you that I have been accused many times in an unfounded way, of making false claims, without even having the opportunity to express myself or even to others replicated some of my work, for lack of data.
But that is not relevant at the moment. I am over that a long time ago.

“I thought that since this was an OU forum that there was a possibility this circuit exhibited OU but I guess I'm wrong in that assumption so for that I apologize!”

Partzman ,You don't have to apologize for that.
It really is supposed that a forum like these investigates possible cases of OU, however if i am not wrong in the long time of existence of this forum, no concrete case has yet appeared or validated, right?
Or at least some of those possible cases died along the way …
Many of them, without scientific confirmation or even their correct replication, but sometimes through an easier and superficial judgment by some , that are false and impossible to exhibit some kind of sign of  OU .
For this reason, I am grateful to a minority of persons in this forum Like Itsu which in my opinion is one of the best replicators on this forum , who manage to put self-centeredness aside, and are governed by the necessary pragmatism, to evaluate certain circuits dissected here.
So I repeat again:
You do not need to apologize for assuming that there might be a possibility that this circuit would exhibit some kind of manifestation OU, It seems logical to me, otherwise why would it be called Overunity Research?
it seems to me that we are in tune about this point .
Contrary to what maybe  you may think, I appreciate your work and help, My thanks


Partzman best rewards


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Nelson Rocha

" The goal is not to be successful, the goal is to be valuable.
Once you’re valuable, instead of chasing success,
it will attract itself to you. "
   
Group: Guest
Nick,
What are you doing here?

Has the censorship at Stefan's place gotten so bad ?


   itsu:  Ok, thanks for mentioning that to me about finally having the right transistor, and better simulation tests now also.

   Verpies:  Yea, things are a bit boring there at times. Lots of talk, but no action. And I like action, even if it gets you nowhere.
   BTW: What were you doing there? Were you checking into Lanca's recuperation at the asylum, perhaps.
   Getting rid of him is like trying to get rid of an unwanted cat.
   Sorry guys, I don't want to distract anyone here. So, I'll cut the small talk. Just like to have "a little funny with friends", like Nelson once said.
   
Group: Experimentalist
Hero Member
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Posts: 1671
Thanks for confirmation Gyula.

But in the unshorted version, it still stops at 400ms,  right?



So what does this say about the Nelson circuit, does it mean that what Nelson showed can be simulated?
If so, then it must be electronically explainable.

Itsu

Itsu,

One explanation that may provide the answer is that as far as I can see, the parameter list for BJTs in  LtSpice does not include any parameters for the emitter-base negative resistance region nor the typical zener voltage breakdown under reverse bias conditions.  Lacking these parameters could/would affect the simulation IMO.

For example in my sim with the output shorted, when Q1 has 42v peak on the emitter, the base voltage is 23.53v peak, and the collector is 23.03v peak.  The voltage differential between the reverse biased base-emitter junction is far above a normal NPN which would typically zener at ~7-9v. 

Also with the base-collector junction forward biased, in years past this would have been termed an "inverted" operation for the NPN.  IOW, with the b-c forward biased and the b-e reversed biased, the roles of the emitter and collector have been switched or inverted.  Most BJTs will operate in this manner although the performance is greatly reduced.

So without an accurate model for the BJT, it may not be possible to simulate Nelson's circuit accurately.

Regards,
Pm
   
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