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Author Topic: Exponential voltage multiplier  (Read 609 times)
Group: Moderator
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Posts: 235
Hi folks,

I've been delving deep into capacitors as of late. The two equations (Q=CV & E=CV2/2) have been bugging me.

The first one is a linear relationship, because as capacitance or voltage increases then charge increases linearly.

The second one is an exponential relationship, because as voltage increases then energy increases exponentially.

If it is possible to increase voltage in a linear fashion then we effectively gain the difference between CV and CV2/2.

Most voltage multipliers work in a linear fashion. As the number of stages increases then the voltage increases by the source voltage, e.g. if source voltage was 12V and we had a 5 stage multiplier (Greinacher/Cockcroft–Walton multiplier, Dickson charge pump etc.), then the voltages across each stage would be 12V, 24V, 36V, 48V, 60V, 72V (I'm deliberately ignoring any circuit losses, diode voltage drops etc.).

I then found something called an exponential voltage multiplier which piqued my interest. In an exponential voltage multiplier, each successive stage doubles the preceding stage's output voltage. For example, if the source voltage was 12V, and again we had a 5 stage multiplier, then the voltages across each stage would be 12V, 24V, 48V, 96V, 192V, 384V.

European patent application 88305898.4 - Compensated exponential voltage multiplier for electroluminescent displays made for very interesting reading. It describes in fine detail a scheme to multiply voltage like I described above.



In short, the example in the patent starts with a 2.5uF capacitor and 15V source voltage. It has 5 stages and halves the capacitance and doubles the voltage for each successive stage. Ultimately it ends up with 0.04uF (actually 0.03906uF) charged to 960V.

2.5uF charged to 15V has 0.0000375 Coulombs and 0.00028125 Joules.
0.03906uF charged to 960V has 0.0000375 Coulombs 0.018 Joules.

You can see that there was a deliberate action in the patent to halve the capacitance when the voltage doubled. This maintains the charge at a constant level through the pipeline of stages. The energy, however, increases exponentially. The output energy is 64x the input energy.

You can have as many stages as you desire, and increasing the frequency increases the output voltage according to the patent.

The secret seems to be in the control scheme. It's a bit cryptic and I'm trying to decypher it at the moment. I've put together a simulation and it isn't working entirely according to the patent, but that's because of the logic that I've implemented so far. The voltage is indeed multiplied in the first 3 stages, but at the moment the last 2 stages are ouputting the same voltage as the 3rd stage. Some more work to do.

Firefox just crashed, so I lost some work. Argh! I'll be continuing the simulated circuit this evening and hope to post an example later.

Seems promising so far.
   
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Quote from the patent:

The magnitude of the output voltage of the exponential voltage multiplier 100 is a function of the speed of clocking of the stages, the ratio of store states to stack states, capacitor ratios, component losses, input voltage and the load connected to its output.

The amount of current that the exponential voltage multiplier can source to a fixed load will determine the voltage on the output or the voltage across the load. For a given load, the fixed amount of current passing through exponential voltage multiplier 100 will produce a fixed voltage.

In order to increase the voltage across the load, an increased amount of current must be transferred through the exponential voltage multiplier. Since the exponential voltage multiplier circuit operates as a series of stages which stack voltages to charge capacitors, the analogy to a "bucket brigade" is appropriate to describe how an increased amount of current can be transferred to the output by increasing the speed of operation or the speed of clocking of the exponential voltage multiplier.

Other factors that would affect the amount of current that can be passed include the size of the capacitors which are charged within each stage and the speed of operation of the actual switches within the stages. In the preferred embodiment of the present invention, a ternary counter 117 is used to drive exponential voltage multiplier 100 at a variable frequency. The counting sequence implies that each stage is charged twice before it is stacked. This 3-state limitation implies that each capacitor of each stage is charged less than its theoretical maximum value than if more store states were used. By increasing the speed of clocking from ternary counter 117, however, the output voltage of the exponential voltage multiplier into a fixed load can be increased by transferring a larger amount of current given the control of each stage.
   

Group: Professor
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The second one is an exponential relationship, because as voltage increases then energy increases exponentially.
No. In order for it to increase exponentially the voltage would have to be in the exponent.  It is not.
   
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...

In short, the example in the patent starts with a 2.5uF capacitor and 15V source voltage. It has 5 stages and halves the capacitance and doubles the voltage for each successive stage. Ultimately it ends up with 0.04uF (actually 0.03906uF) charged to 960V.

2.5uF charged to 15V has 0.0000375 Coulombs and 0.00028125 Joules.
0.03906uF charged to 960V has 0.0000375 Coulombs 0.018 Joules.
...

You seem to be implying that this is somehow overunity.  It is not...

The .04uf output cap is charged by sequentially charging and stacking all the preceding capacitors in the circuit to produce a higher voltage and applying that higher voltage to the .04uf output cap (although it can be any value).  After many cycles, the output cap is (over a period of time) charged to the voltage levels given in the patent.

Your stored energy comparison would be OU if the .04uf cap was charged to its final value in just one charge/stack cycle of the preceding stages.  However, this is not the case.  The switched capacitors are charged, stacked, and applied to the output cap many times to eventually charge the output cap to the stated voltage.

PW 
   
Group: Moderator
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Posts: 235
Yes you're right.

I just plotted out the charging sequence in Excel and it takes and increasing amount of time before the output cap is charged.

C = charge, S = stack, H = hold

Input         CSCSCS CSCSCS CSCSCS
1st stage   HCHCHS HCHCHS HCHCHS
2nd stage  HHHHHC HHHHHC HHHHHS

Input: 2 cycles to charge
1st stage: 6 cycles
2nd stage: 18 cycles
3rd stage: 54 cycles
4th stage: 162 cycles
5th stage: 486 cycles

Mystery solved. Right, on to other things!
   
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