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Author Topic: Parametric Charging  (Read 36867 times)
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It is odd that we both seem to be showing COPs of about the same value Pm

Are we both making the same mistake somewhere,or have we finally found the secret to a true energy amplifier ?


Brad.

Brad,

Yes it is odd!  There is more to this simple circuitry than meets the eye and at this point in time, I don't think were experiencing measurement error! 

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Still on my initial 4 MOSFET setup.

I redid my measurements without the load resistor and found a certain frequency (475KHz) where the max voltage
across C1 was almost covering 100ms (88ms or so), but where i found some strange effects on the signals, see screenshot.

The white trace (ontop of the yellow input voltage trace) represents the input calculations yellow x green where
yellow is the input voltage and green the input current)

The red trace represents the calculated voltage across C1 (blue - purple).

What we can see is that between the red vertical cursors, the input power (white) seems negative (-1.906W), while the
voltage across C1 is positive (14.7V).

So this means that we have more out then in at this point, but the fact that i see a negative input power makes
me thinking we are looking to some kind of artifact.

If this is what you mean by COP >1 then i have serious doubts.

by the way, i have setup gating between the vertical cursors.

 
Itsu
   
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Still on my initial 4 MOSFET setup.

I redid my measurements without the load resistor and found a certain frequency (475KHz) where the max voltage
across C1 was almost covering 100ms (88ms or so), but where i found some strange effects on the signals, see screenshot.

The white trace (ontop of the yellow input voltage trace) represents the input calculations yellow x green where
yellow is the input voltage and green the input current)

The red trace represents the calculated voltage across C1 (blue - purple).

What we can see is that between the red vertical cursors, the input power (white) seems negative (-1.906W), while the
voltage across C1 is positive (14.7V).

So this means that we have more out then in at this point, but the fact that i see a negative input power makes
me thinking we are looking to some kind of artifact.

If this is what you mean by COP >1 then i have serious doubts.

by the way, i have setup gating between the vertical cursors.

 
Itsu

Itsu,

Since I have gone to the larger than normal CSR values, I have not seen any negative input power levels so there is something not right with the scan.  Since you are now measuring between the vertical cursors, have you placed cursor A to the far left of the screen and placed cursor B at the various 10ms divisions.  If yes and the power measurements are still negative, then your 100kS/s sample rate is affecting the accuracy IMO.  Otherwise the circuit operation as you describe and is shown in the scope shot agrees with my results.  IOW, if you now raise the frequency slightly, the time period from start to maximum C1 voltage will increase.

I will again setup the same test you are trying to replicate and reduce my sample rate to 100kS/s instead of 100MS/s to see if I get close to the results you are in the 100ms scan.

Thanks for doing the work! O0

Regards,
Pm
   

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Buy me some coffee
Still on my initial 4 MOSFET setup.

I redid my measurements without the load resistor and found a certain frequency (475KHz) where the max voltage
across C1 was almost covering 100ms (88ms or so), but where i found some strange effects on the signals, see screenshot.

The white trace (ontop of the yellow input voltage trace) represents the input calculations yellow x green where
yellow is the input voltage and green the input current)

The red trace represents the calculated voltage across C1 (blue - purple).

What we can see is that between the red vertical cursors, the input power (white) seems negative (-1.906W), while the
voltage across C1 is positive (14.7V).

So this means that we have more out then in at this point, but the fact that i see a negative input power makes
me thinking we are looking to some kind of artifact.

If this is what you mean by COP >1 then i have serious doubts.

by the way, i have setup gating between the vertical cursors.

 
Itsu

Well Itsu,never seen a scope trace like that before.
Looks to me like the scope is not triggering correctly-maybe?


 Brad


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Itsu,

Since I have gone to the larger than normal CSR values, I have not seen any negative input power levels so there is something not right with the scan.  Since you are now measuring between the vertical cursors, have you placed cursor A to the far left of the screen and placed cursor B at the various 10ms divisions.  If yes and the power measurements are still negative, then your 100kS/s sample rate is affecting the accuracy IMO.  Otherwise the circuit operation as you describe and is shown in the scope shot agrees with my results.  IOW, if you now raise the frequency slightly, the time period from start to maximum C1 voltage will increase.

I will again setup the same test you are trying to replicate and reduce my sample rate to 100kS/s instead of 100MS/s to see if I get close to the results you are in the 100ms scan.

Thanks for doing the work! O0

Regards,
Pm

PM,

this screenshot/effect only happens at this specific frequency, any higher or lower its much smoother.

This circuit almost act like a PLL system as within a 100Khz range (430 - 530KHz) it shows the sine wave like
signals across C1 (blue and purple traces) around 91V, below that it starts to hickup, above it it the signals collaps.

So yes, i guess this specific frequency is indeed some kind of artifact due to the 100KS/s sample setting.

So still not able to see the COP >1.


Itsu
   

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Well Itsu,never seen a scope trace like that before.
Looks to me like the scope is not triggering correctly-maybe?


 Brad

Tinman,

could be, but at any other frequency the triggering is ok, which seems odd to me.

Itsu
   
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PM,

this screenshot/effect only happens at this specific frequency, any higher or lower its much smoother.

This circuit almost act like a PLL system as within a 100Khz range (430 - 530KHz) it shows the sine wave like
signals across C1 (blue and purple traces) around 91V, below that it starts to hickup, above it it the signals collaps.

So yes, i guess this specific frequency is indeed some kind of artifact due to the 100KS/s sample setting.

So still not able to see the COP >1.


Itsu

Itsu,

In your post #39 and also in this test, were you using the 4x current probe loop?  If yes, did you compensate manually by dividing your input power by 4?

Regards,
Pm
   

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PM,


yes and no on those questions  :-[, but even then, it still does not look good looking at post #39,
not sure how that influences the last (negative input power) test.

To much things to think of in these measurements  :o

OK, i tested with the current set 5x lower then actual (so not 4 but 5) and still at 475KHz i get negative power calculated.


Itsu

 
   
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Itsu,

Here are two scope pix of my circuit in post#9 taken at different sample rates for comparison.  P9A used a sample rate of 100MS/s and p9B used 100kS/s.  P9B loses all definition of the high frequency but accurately shows the Math for CH2-CH3 voltage across C1 which is a slow event.  In essence, p9B is useless.  These were taken in the hi-res mode with a single sample.

What I don't understand is the complete lack of the generator voltage on CH1(yel) and current on CH4(grn) as compared to your scope shot on your TDS!?!  Perhaps the TDS series uses a different sampling algorithm to compensate for the slow sample rates during longer sweeps.

IMO, the 100ms sweep measurements taken with a 100kS/s sample rate can not be relied on for accuracy due to aliasing with the input frequency of ~500kHz.

Regards,
Pm
   
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Itsu,

I fired up my TDS 3034 and took measurements over 100ms of the same circuit above and came up with Math power measurements all over the place including negative taking single shots.  One thing to look at is to expand the captured view with the horizontal scale knob and see what happens to the traces.  There are just not enough samples of the 500-600kHz waveforms taken at the 100kS/s rate to rely on their measurements over a 100ms sweep.

I will later post some results of a modified circuit that will lower the frequencies down to a level that shouldn't require the higher sampling rates which hopefully will allow you and others to replicate.

Regards,
Pm
   

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Ok PM,

so there is no use to hunt for COP >1 with my present setup and used scope.

I wonder how other scopes manage as mine is old, but still fast.
Perhaps Tinman can show similar traces to see how his Rigol performs.


Anyway, i guess i will be switching over to your latest circuit which hopefully is no
problem for my scope.


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All,

Here is the latest update to the circuit in post #41.  This circuit is providing apparent gain but not with parametric means as the mosfet rectifiers have been replaced with schottky diodes for improved performance.  Therefore, the apparent gain means (which is similar IMO to what Tinman has seen) should be researched assuming that the gains are real.

The schematic is shown below with the circuit operating at 102kHz plus an input bypass cap C2 is added to remove any dc from L1 and P1.

The first scope pix is taken over a 20ms horizontal sweep with the cursors measuring between start and 10ms.  Note the 250MS/s sample rate.

The second scope pix is an expanded view of the 50ms cursor position to show detail of the waveforms.

The data table is shown next with the various COP calculations and notes.

If one takes an analysis of the input power and C1 charge levels between ~8ms to 20ms (not shown or detailed here),  it becomes apparent that a loaded continuous power level of ~1.3w with gain can be achieved at 102kHz.  The last scope pix shows the results of this test using a 3.71k ohm load resistor across C1.

The measurements show an output dc level of 69.91 volts across C1 and the load which equates to a Pout of 69.91^2/3.71e3 = 1.317 watts.  The Pin is seen to be 777.1mw for an apparent COP = 1.317/.7771 = 1.695.  However, this does not account for the loss in the CSR which is Pcsr = .9116^2/10 = 83.1mw resulting in an adjusted apparent COP = 1.317/(.7771-.0831) = 1.90 .  Note how this compares to the COPb value in the data table at the 10-12ms sweep mark.

This topology lends itself to scaling much better than the parametric design due to the ease of building a tightly coupled transformer verses large parametric capacitors.  I anticipate being able to lower the frequency of this design considerably depending on the actual theory of operation which is yet to be determined.

Regards,
Pm

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PM,


looking much simpler, also in measuring, so will be trying to replicate in the next days.

Meanwhile i have removed the current probe and used a 100 Ohm 1% csr in the return line from C2 to ground like post #9 diagram.

Now the negative input power values are gone and i see more steady signals.

But still no COP >1 is noted across 2 different frequencies checked (455 and 464KHz), below table is for 464Khz

ms    input mw  /  uJ        C1 V  /  uJ               c1 = 5.015Uf
10      118          1180     10.9      298
20      129          2580     15.6      610
30      139          4170     20.5     1054
40      185          7400     25.3     1605
50      303        15150     31.8     2536
60      522        31330     40.2     4093
70      745        52150     51.7     6703
80     1027       82160     66.1    10956
90     1361      122490     82.7    17150
100   1361      136100     93      21687


Will leave this setup and start building PM's latest.


Itsu
   
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Hi Pm,

Thanks for including me in your list.

Would like to ask on this latest test: how the input DC power draw changes for the IXDD609  when you remove the 3.71 kOhm load resistor for a moment from C1? I understand that you measure AC input power but for applying a practical looping circuit it would be useful to learn about the total DC input power to the IXDD609 and how it changes when the output load is removed from C1 for some moments.

The looping circuit Ion suggested is interesting and simple.  A little bit more involved alternative circuit would be the use of an isolated DC-DC converter circuit like for instance the LT830* family ((about 7-8 USD at Digikey, Mouser, etc). They draw some hundred microAmper for their internal circuits from a wide range input supply voltage and the output is adjustable with a single series feedback resistor. The isolation is done with a flyback transformer (5-6 USD). Here is the IC family:

No-Opto, Monolithic Isolated Flyback Converters

Part Number    Internal Power Switch    Input Voltage Range (V)     Max Output Power (W)
  LT8301                  65V/1.2A                               2.8 to 42                                 6
  LT8302                  65V/3.6A                               2.8 to 42                               18
  LT8304              150V/2A                               3    to 100                                  24
  LT8300               150V/260mA                       6    to 100                                    2.5
  LT8303               150V/450mA                       5.5 to 100                                    5
  LT8315               630V/300mA                     18    to 560                                  15

I attached one typical circuit for IC type LT8301, a step up converter though, to show the relative simplicity.  The individual data sheets include several schematics for different Vin and Vout ranges, efficiency changes mainly between 80% to 90%. 

I mention looping because it rules out the perpetual dilemma of the accuracy of scope sampling.  Maybe it is time to attempt looping, that is all.
Of course a low power timer circuit is also needed to provide for a clock signal to drive the IXDD IC but a CMOS timer like LMC555 or TLC555 would draw max 1-2 mA from say at 10 V at the clock frequencies involved.
 
Gyula
   
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Dear Gyula

With the circuit I offered, I was seeking a method of as direct a conversion as possible from the charge on the accumulator capacitor to an oscillatory sinusoidal waveform with a minimum of  intermediate steps. I reasoned the burst oscillator tank circuit fed from a negative resistance device would be most direct.

One could also go from the charge on the accumulator cap to any form of conventional oscillator of high efficiency, class C or even a push pull or Mazili type.

I did not see the need to go to a DC-DC converter, as you still would need to go to the HF AC required to directly drive the system without needing the mosfet, and we are already starting with DC. I reasoned a DC-DC converter would add an unnecessary conversion loss, in addition to the DC to AC oscillator.

On the other hand if the devices you suggested could be arranged to drive the system with DC to AC conversion by eliminating the rectification step, there might be merit.

A complete diagram of your thoughts on the subject would be welcome , including the DC to DC then DC to AC conversion.

Where an impedance match is desired, the DC to DC converter could have considerable merit.

I believe partzman may have some tricks up his sleeve using his "pulsed saturating oscillator" that may be most efficient.

Quote
I mention looping because it rules out the perpetual dilemma of the accuracy of scope sampling.  Maybe it is time to attempt looping, that is all.

I completely agree with your sentiments in the quote.

Thanks for your suggestions

Regards


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Buy me some coffee
Tonight i went about rearranging the circuit,so as i could confirm the voltage across the primary winding in my DUT.

As my scope and SG share a common ground(pain in the butt),i had to make the common rail of the circuit the positive,and the input to the transformer the negative--see modified circuit below.
This allows me to measure the voltage across the coil before the 10 ohm CVR.
Turns out my calculated voltage across the coil from previous tests,where i subtracted the voltage across the CVR from the total voltage,was correct,and the results are the same.

The first scope shot shows the pulse input,which is a 20% duty cycle.

The second scope shot shows the current and voltage trace,but where we now see a voltage across the coil by it self(yellow trace),and then the voltage across the coil and CVR series(blue trace).

So this time when we make our current calculations,we subtract the coil voltage from the total voltage to get out voltage across the CVR.

So V/in is an average of 1.8v for the 20% on time.
I/in is 2.9v minus 1.8v= 1.1v across 10 ohms=110mA for our 20% on time.
So P/in for the 20% on time is 198mW
The 10 ohm CVR during this 20% on time dissipates 121mW
So our average P/in is 198mW minus 121mW X 20% =15.4mW

P/out is 22v across 15k ohms
P/out = 32.26mW

COP= 32.26/15.4 X 100 = 209.48%
 
The COPs are consistent,no matter which way i take the measurements.


Brad

P.S
Added the missing input pulse scope shot--Thanks Itsu for the reminder  O0
« Last Edit: 2018-08-30, 23:33:25 by TinMan »


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Tonight i went about rearranging the circuit,so as i could confirm the voltage across the primary winding in my DUT.

As my scope and SG share a common ground(pain in the butt),i had to make the common rail of the circuit the positive,and the input to the transformer the negative--see modified circuit below.
This allows me to measure the voltage across the coil before the 10 ohm CVR.
Turns out my calculated voltage across the coil from previous tests,where i subtracted the voltage across the CVR from the total voltage,was correct,and the results are the same.

The first scope shot shows the pulse input,which is a 20% duty cycle.

The second scope shot shows the current and voltage trace,but where we now see a voltage across the coil by it self(yellow trace),and then the voltage across the coil and CVR series(blue trace).

So this time when we make our current calculations,we subtract the coil voltage from the total voltage to get out voltage across the CVR.

So V/in is an average of 1.8v for the 20% on time.
I/in is 2.9v minus 1.8v= 1.1v across 10 ohms=110mA for our 20% on time.
So P/in for the 20% on time is 198mW
The 10 ohm CVR during this 20% on time dissipates 121mW
So our average P/in is 198mW minus 121mW X 20% =15.4mW

P/out is 22v across 15k ohms
P/out = 32.26mW

COP= 32.26/15.4 X 100 = 209.48%
 
The COPs are consistent,no matter which way i take the measurements.


Brad

Brad,

Good work, I'm glad to see your results!  O0 

I do have two suggestions that may improve your performance and output.  Change the diode pairs to a single schottky rectifier on each side and try a 50% duty cycle.  We are no longer operating in a parametric mode and I will go into this in a later post.

Regards,
Pm 
   

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Guys,

a word of caution, seeing those values of COP = 209% should trigger you to look for any (measurement) errors,
as normally this would not be possible.

Not sure if this any measurement error, calculation error or even the circuit itself that does not lend itself for
doing measurements with our equipment.

Tinman, could you use the math function on your scope to calculate the power in?
By the way, i miss your "first scope shot" in your last post.


Itsu
« Last Edit: 2018-08-30, 17:55:39 by Itsu »
   
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All,

These test results are with the same basic circuit as my post #61 with the following changes: L1 is 2.47mH wound with litz wire on a gapped 1/4" ferrite core and the frequency is 64kHz so no schematic is shown.

The first scope pix is a 40ms sweep of the device and I would like to point out that Cursor B indicates a C1 voltage that is higher than indicated in the data table.  The reason for this is because I use the mean measurement of the C1 voltage by placing both A and B cursors close to the measuring point rather than relying on the single cursor measurement.  More accurate this way. 

Some might wonder why I keep running these sweeps and the reason is that from the data, we can determine the power level that can be reached with the circuit.  This is done by treating the C1 charge curve as an energy slope over time and then converting to power.  For example, let's calculate the energy slope differential (Esd) from 16ms to 32ms by using the C1 voltage levels at these points.  With this we calculate Esd = (74.1^2-47.31^2)*3.94e-6/2 = 6.408nJ.  To convert the Esd to power available (Pa), we simply divide Esd by the time period so, Pa = 6.408e-9/(32e-3-16e-3) = 400mw.  This is the approximate power level we can expect with these circuit values and operating parameters.  We then use this value to determine the load resistance at any given C1 voltage.  In this case we chose the C1 voltage to be ~62v (highest COP level) which resulted in using a 7.461k ohm which was on hand.

Next is the data table with all the calcs and circuit values.

Last is a scope shot of the device running in the continuous mode with the 7.461K load.  Compare the power output to the above calculations as well as the COP to the data table.  I believe these numbers are real!

Edit: OOps, I meant to calculate the COP in this mode so the output power is Pout = 55.16^2/7.461e3 = 408mw.  The input power is 62.14mw so the COP = 408/62.14 = 6.57

At Gyula,

I will check and post the differential power measurements of the Ixys driver after this has soaked in.

So, this leaves us with the question of where the extra energy is coming from.  After losing lots of sleep and pondering on this, I've concluded that it is supplied by the aether as Arie DeGues describes in his patent NL1032750.  The tightly coupled bifilar secondary meets all the criteria that Arie describes.  If you are not familiar with this patent I've attached a copy below. 

At Peter,

I've done a current search for this patent thru WIPO and can't seem to find it.  Where did you find the original copy that OUR translated?

Regards,
Pm
   

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PM, Brad

Great work 8)

Yes I think if we can shake the aether and collect a charge over and above, we are in business.

I've got that buzz feeling

Regards

Mike 8)


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As a follow up on my previous post, below is a scope pix for comparison of the same circuit running continuously with the Tek TCP0020 current probe measuring the current rather than the 10 ohm CSR in case there were any doubts on the input current measurements and calcs.

The 10 ohm CSR is removed so the output voltage is slightly higher and we see the power in is 74.36mw.  The power output is 57.7^2/7.461e3 = 446.2mw so the COP = 446.2/74.36 = 6.00.

At Guyla,

I believe you wanted these measurements taken on the input from the power supply feeding the circuitry.  I'm using a Rigol DP832 with the hi-res option and CH1 is set at 30vdc and CH2 is 10vdc to arrive at the 40vdc total.  While running with the load attached for the above results, CH1 reads .66 watts and CH2 reads .23 watts.  With the circuit disconnected from the output of the IXYS 609P1 driver, CH1 reads .09 watts and CH2 reads .05 watts.  This results in a delta power level of .75 watts.

Regards,
Pm
   
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Hi Pm,

Thanks!

Regarding your patent question, there seems to be a typo at the end of the patent number, it is not zero but a 9   i.e. NL1032759

At the European Patent Office here are Arie DeGues's patent list:

https://worldwide.espacenet.com/searchResults?ST=singleline&locale=en_EP&submitted=true&DB=&query=GEUS+ARIE+MELIS&Submit=Search   

 and the 3rd in the list is the patent you asked, a direct link to it is here:

https://worldwide.espacenet.com/publicationDetails/biblio?II=2&ND=3&adjacent=true&locale=en_EP&FT=D&date=20080429&CC=NL&NR=1032759C1&KC=C1#

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Hi Pm,

Thanks!

Regarding your patent question, there seems to be a typo at the end of the patent number, it is not zero but a 9   i.e. NL1032759

At the European Patent Office here are Arie DeGues's patent list:

https://worldwide.espacenet.com/searchResults?ST=singleline&locale=en_EP&submitted=true&DB=&query=GEUS+ARIE+MELIS&Submit=Search   

 and the 3rd in the list is the patent you asked, a direct link to it is here:

https://worldwide.espacenet.com/publicationDetails/biblio?II=2&ND=3&adjacent=true&locale=en_EP&FT=D&date=20080429&CC=NL&NR=1032759C1&KC=C1#

Gyula

That last patent is where I am atm, but I'm using 3 phase same frequency, not two, the first phase is converted into a floating neutral and any positive wave is crossed over on the output.

Regards

Mike 8)


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Hi Pm,

Thanks!

Regarding your patent question, there seems to be a typo at the end of the patent number, it is not zero but a 9   i.e. NL1032759

At the European Patent Office here are Arie DeGues's patent list:

https://worldwide.espacenet.com/searchResults?ST=singleline&locale=en_EP&submitted=true&DB=&query=GEUS+ARIE+MELIS&Submit=Search   

 and the 3rd in the list is the patent you asked, a direct link to it is here:

https://worldwide.espacenet.com/publicationDetails/biblio?II=2&ND=3&adjacent=true&locale=en_EP&FT=D&date=20080429&CC=NL&NR=1032759C1&KC=C1#

Gyula
Gyula,

Ah, thanks for this info!  O0

Pm
   
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That last patent is where I am atm, but I'm using 3 phase same frequency, not two, the first phase is converted into a floating neutral and any positive wave is crossed over on the output.

Regards

Mike 8)

Mike,

The last patent in the list doesn't seem to be available.  Do you have a copy?

Regards,
Pm
   
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