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Author Topic: Conventional (non-OU, but related) electronic circuit problem  (Read 8042 times)

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Working on the Ruslan setup recently and some years ago there was an attempt to create a PLL (Phase Locked Loop) system to keep one of the major modules being the Series LC Resonance module (Inductor coil / Wima cap) in a locked resonance.

Several (Russian) circuits were presented, but most were no true PLL systems and did not work well.

Then verpies designed a PLL system which did work and again was recently referenced to in this Ruslan 2nd attempt thread:
https://www.overunityresearch.com/index.php?topic=3926.msg91004#msg91004


Due to several reasons it was never implemented, one of them being the problem as mentioned in the quote from verpies in that link above being:

Quote
However, hysteresis introduces inherent phase shifts of its own, so more effort should be put into improving these i & v comparators in order to eliminate these phase shifts ...but that is nothing difficult or exotic.
If anyone here has a good idea how to improve them easily, please share it.


So in this thread i again will be asking help from anyone able to shed some light on this problem in an attempt to make it better (i.e. no phase shift) and immune to any DC components variations and excessively high amplitudes (overloads).
 
Below 1st attached is the PLL circuit i am talking about which is a novel combination of the 74H4046 PLL chip and the TL494 PWM controller.
The problem area is the input area (top left) where the voltage and current signals from the Series LC (in phase when in resonance) come in.

The idea is to lock those "in phase when in resonance" V and I signals so it stays in resonance.

 
Below 2nd small diagram is a quick setup of a small part of that input area to show the problem  (hysteresis introduces inherent phase shifts).
I used a FG to mimic the Series LC by inserting a sine wave there.

The screenshot 1 shows that the sine wave (input signal in blue) is not centered symmetrically inside the rectangular wave (yellow) on either side.

That screenshot shows a fairly noiseless input sine wave, but still the phase shift is there, which gets progressively worse when more noise is added to the sine wave see screenshot 2.

See screenshot 3 for a good example.

Finally i made a video showing again the problem here:  https://youtu.be/GqDP3NI66cE

Looking for a solution to that problem, so please anyone who has an idea join in to make this circuit even better, but be aware, it must be a universal solution i.e. a frequency independent solution.


Regards Itsu 
   

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Looking for a solution to that problem, so please anyone who has an idea join in to make this circuit even better, but be aware, it must be a universal solution i.e. a frequency independent solution.
Without that condition you could just slap a fixed frequency Low Pass Filter before the noisy sine to square converter.
If that filter introduces a frequency-dependent phase delay (as most do) then the problem returns.
« Last Edit: 2022-02-05, 14:27:57 by verpies »
   
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Itsu,

You could use an Arduino to implement the various PLL functions as is described here using an Arduino Uno-

https://stackoverflow.com/questions/56475382/software-pll-to-generate-3-2-khz-sampling-freq-locked-with-1pps-from-gps-in-ardu

Although I have not done this myself, this is the approach I would use if it were my problem!  Also there are much faster boards available, however for 10kHz or so the Uno should suffice to keep the resonant phases under control.

Regards,
Pm
   

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Hi PM,

the PLL itself is no problem, it works fine, only the front-end is prone to the problems (phase shift etc,) mentioned and need improvement.

But thanks for pointing to the arduino for a PLL solution, perhaps the faster ESP32 is a better option here then.

Itsu 
   
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Hi PM,

the PLL itself is no problem, it works fine, only the front-end is prone to the problems (phase shift etc,) mentioned and need improvement.

But thanks for pointing to the arduino for a PLL solution, perhaps the faster ESP32 is a better option here then.

Itsu

OK.  What is the reverse capacitance of diodes D3-D6?  This could be the cause of the slight output delay of the op amp but I'm sure you have considered that. 

Pm 
   

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OK.  What is the reverse capacitance of diodes D3-D6?  This could be the cause of the slight output delay of the op amp but I'm sure you have considered that. 
This can be determined experimentally since this circuit is on the breadboard now.
The diodes can be removed altogether and the amplitude of the signal from the FG decreased to 1.2Vpp so the op-amp is not overdriven (which is the purpose of these diodes).
« Last Edit: 2022-02-04, 20:53:20 by verpies »
   
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Without that condition you could just slap a fixed frequency Low Pass Filter before the noisy sine to square converter.

Verpies,

I always thought this circuit was somewhat "unique", to say the least.  Your application of the 4046 is unlike any I have seen before.  I have a few questions...

What/where are R1 and C1?  Are these the actual inductor and Wima caps or just a proxy for them?

Was there a particular reason you chose the AD8032's?  Are the I and V sense amp gains set to clip the output into a square wave?  If so, perhaps comparator's would do a better job of producing an edge at the zero crossing of the I and V.  Also, with only 15ma of output drive, is the 8032 sufficient to drive R1/C1?   

Why did you not use the 4046 VCO out (with VCO center freq and range selected and reduced via R1/R2)?

Before making further mods to this circuit, or designing a new one, perhaps we should all discuss what phase relationship and between what points in the circuit we are trying to maintain.

From the videos, and I may be wrong, it seems that the phase of the inductor current with respect to that of the voltage across the grenade was the particular phase relationship that needed to be maintained.

Additionally, varying the frequency of the P-P drive to maintain inductor/Wima resonance seems to disregard the effects varying frequency has on grenade tuning.

Just kicking around a few thoughts...

PW
   

   

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OK.  What is the reverse capacitance of diodes D3-D6?  This could be the cause of the slight output delay of the op amp but I'm sure you have considered that. 

Pm

PM, 

the diodes are 1N4148's which have a "diode capacitance" of 4pF according to the data sheet.

I can try verpies his suggestion to remove them, decrease the sine wave to 1.2Vpp and see what happens.
 
   

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Picowatt,

Quote
What/where are R1 and C1?  Are these the actual inductor and Wima caps or just a proxy for them?


These are a proxy just to test out the functionality, they are a small toroid with about 100 turns and a small 10nF Wima cap.

   
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Itsu,

The problem seems to be inherent to the AD8032 op amp!  See the attached sim which follows your scope traces pretty close.  It does not matter if the diodes are connected or not, the delays are still there!

Trying to get a work around or perhaps a different op amp.

Pm
   
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Itsu,

I'm not sure why you are using an asymmetrical power supply but with +-5vdc supplies and a feed forward cap of 1000pf, the phases are near perfect.  The 1000pf will most likely affect the network impedance of the actual circuit so this may not work as advertised!  Also the diodes are now 1N4148s.

Pm

Edit:  I see why you are using the asymmetrical supplies after looking at the 74H4046 data sheet.  Perhaps a 1N4148 blocking diode will suffice on the op amp output but may require +_6vdc supplies for the positive level swing for the 4046 input.
   

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Thanks Partzman,


good idea to use the sim, can you attach the spice file please.

I have removed the 4 1N4148's and had to put a 6.8Vpp sine wave to get any square wave output, but then it looks more symmetrical, see screenshot.
But the square wave is more  asymmetrical now, adjusting the 100K pot does not change that.

The asymmetrical power supply was / is needed, as i understand it, to create the triangle input into the TL494, but verpies would know.
We might add another +-5vdc supply for this front-end only

Itsu

   
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Hi Itsu,

have you tried something like this ?

Regards,
Vasik

PS As a generic comment - why not use comparator instead of OP Amp ?
   

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Hi Vasik,


yes, that was one of the PLL circuits i used, but turned out to be no real PLL system as i mentioned above, see the conclusion in this video:
https://www.youtube.com/watch?v=zdIf9Pjyuhs

Itsu
   
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Itsu,

The sim file is attached below.

Pm
   

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PM,   O0
   
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Hi Vasik,

yes, that was one of the PLL circuits i used, but turned out to be no real PLL system as i mentioned above, see the conclusion in this video:
https://www.youtube.com/watch?v=zdIf9Pjyuhs

Itsu

Itsu,

this might be irrelevant but I remember Stalker saying that you not supposed to load push pull,
so just a simple "frequency lock" should be enough.

You can check induction heater schematics, they usually have nice voltage/current sensors schematics which you can reuse in your setup.

Regards,
Vasik
   

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I always thought this circuit was somewhat "unique", to say the least.  Your application of the 4046 is unlike any I have seen before.
The only unique part is the generation of the TL494 clock by the HC4046 with the aid of the op-amps (U3a & U3b).

I have a few questions...
What/where are R1 and C1?  Are these the actual inductor and Wima caps or just a proxy for them?
This is the external LC circuit that is probed and driven by this circuit.
Note: when answering this question, I assumed you were asking about the L1 and C1 ...not about the "R1 and C1".

Was there a particular reason you chose the AD8032's? 
Just good op-amps all around.  I remember that other jelly-bean op-amps, which I have tried, failed to convert the HC4046 clock into the TL494 clock due to their voltage offsets and slew rate.  You are welcome to use other op-amps but if you simulate them make sure to enter full models including all their imperfections.

Are the I and V sense amp gains set to clip the output into a square wave? 
More like convert to a square wave using two level voltage hysteresis.  The hysteresis provides noise immunity but introduces phase shifts and duty cycle variations (especially when noise is present at the input) - which is the entire problem that is the subject of this thread.

If so, perhaps comparator's would do a better job of producing an edge at the zero crossing of the I and V. 
In theory there is no difference between an ideal op-amp and a comparator.  The real-world differences are implementation-specific.  I used MAX989 comparator in the role of the noisy sine to square converter in the front end and it worked equally well there (not better though). Last but not least, Itsu did not have the MAX989 then and I did not want to complicate his BOM.

Also, with only 15ma of output drive, is the 8032 sufficient to drive R1/C1?   
There it is again: the reference to "R1/C1".  Are we referring to the same schematic posted here by Itsu ?

Anyway, the AD8032 in the front end (U2a & U2b) drive only the CMOS inputs of the HC4046 PLL and the 10k hysteresis resistors, so their output current rating is not exceeded.

Why did you not use the 4046 VCO out (with VCO center freq and range selected and reduced via R1/R2)?
Because TL494.pin5 (CT) requires a specific sawtooth analog waveform and the HC4046.pin4 VCO output is a square digital waveform.

Before making further mods to this circuit, or designing a new one, perhaps we should all discuss what phase relationship and between what points in the circuit we are trying to maintain.
The ultimate goal of this circuit is to drive an arbitrary external LC circuit (L1 & C1) by a push-pull driver, with such frequency that the voltage and current flowing through it are in phase.

However,  the goal of this thread is to design a noisysine-to-square converter that does not introduce phase shifts, duty nor cycle variations and is immune to DC components appearing at the input and to being overdriven by excessive input amplitudes.

From the videos, and I may be wrong, it seems that the phase of the inductor current with respect to that of the voltage across the grenade was the particular phase relationship that needed to be maintained.
Grenade and other specific applications of this circuit are off-topic here.
Actually, even the discussion of anything else but the performance of the noisy sine to square converters in the front end is off-topic here, too -  I am indulging you though  ;).
« Last Edit: 2022-02-04, 22:56:35 by verpies »
   

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The asymmetrical power supply was / is needed, as i understand it, to create the triangle input into the TL494, but verpies would know.
Yes, the asymmetrical power supply was needed to create the sawtooth waveform at the CT input (pin5) of the TL494 chip.

That negative -1.25V supply was just reused in the noisysine-to-square wave converters in the front-end, to accept bipolar feedback signals.  A fully symmetrical ± power supply would have been better, but it was just too much hassle at the time.
Automatic zero level adjustment, as depicted in this TI Application Note, would work, too, and with AC coupling and ½VCC virtual ground a unipolar/single supply would be sufficient.

It would be nice for the guys to see a scopeshot of the voltage waveform at TL494.pin5, with respect to ground (even in the TL494 test configuration depicted in its datasheet on pg.8).
   

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As a generic comment - why not use comparator instead of OP Amp ?
I answered this question in my reply to Picowatt here.
   

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I'm not sure why you are using an asymmetrical power supply
I answered this question in my reply here.

... but with +-5vdc supplies and a feed forward cap of 1000pf, the phases are near perfect.
What about when some noise is superimposed on the input waveform like this ?
« Last Edit: 2022-02-04, 23:28:42 by verpies »
   
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Verpies,

Seems that once I misspoke and referred to "L1" as "R1", I continued on throughout.  I did indeed mean to say "L1".  Apologies for the confusion...

...  the goal of this thread is to design a noisysine-to-square converter that does not introduce phase shifts, duty nor cycle variations and is immune to DC components appearing at the input and to being overdriven by excessive input amplitudes.
Grenade and other specific applications of this circuit are off-topic here.
Actually, even the discussion of anything else but the performance of the noisy sine to square converters in the front end is off-topic here, too -  I am indulging you though  ;).

Understood...

PW

   
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Itsu,

When you say "frequency independent", is there a range of permissible operation that you can specify?  For example, does the desired frequency of operation vary over a limited range (i.e., +/- some small percentage) or are you wanting something with a very wide detection bandwidth?

Is the noise random or are there components that may be synchronous with or harmonically related to the detected signal?

Is the signal to noise ratio depicted in your scope shots representative of the worst case S/N ratio encountered?

PW 
   
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Hi Itsu, your circuit drifts because of component values change with component tolerances to temperature, the problem is the frequency would have to track this drift to keep LC in resonance or the other way is to use a xtal frequency stable circuit (digital) to get your 15khz and then use an LC circuit to obtain resonance.

There is always a way to do what your trying to do, other than drawing energy and heating up the device will end in thermal runaway.

Regards Sil

PS there is a more simple way.
   

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When you say "frequency independent", is there a range of permissible operation that you can specify?
Although I am not him, I think that the front end should not limit the operational frequency range of the remaining circuit. 

The 74HC4046 is specified to work up o 18MHz but the TL494 only up to 300kHz (in my experience up to 500kHz with the external clock source).
So 50Hz to 300kHz seems like a reasonable operating frequency range for a universal circuit like that.

I think that eventually the TL494 should be replaced with a faster P-P PWM chip in order for it to be a better match for the much faster HC4046 PLL. 
If you have any suggestions about a faster P-P PWM chip, post them in the New Developments thread for now.
   
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