Testing Blocking Oscillators For Efficiency

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I will be presenting information regarding the testing of blocking oscillators for efficiency using several methods, mainly for users that can not afford or do not have access to a DSO.

This is not meant to discount the DSO method, but unless you are very experienced with probing issues, you will get garbage input data as POYNT and others have explained.

The methods should give very reasonable accuracy to aid evaluating various circuit designs.

For cohesiveness the thread will be locked until all data is presented. A comments thread will be open for discussion.

Please include the drawing number when commenting on a particular method.

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Pitfalls:

Having built numerous blocking oscillators, it is easy to see where and how various oscillation modes can occur. Some have incorrectly referred to this as a "pseudo resonance" mode(see note), however it has in the past been correctly referred to in the literature as a "spurious pulse mode" or "parasitic oscillation mode".

A properly built unit on a solid breadboard using short soldered leads will only have one and at most two modes of oscillation depending on startup voltage and applied bias.

Most people get in trouble by having the drive winding reversed in which case there are many spurious modes that can occur.

When one considers the criteria for an oscillator:

1) The gain of the loop must be greater than one

2) The phase shift must equal or exceed 180 degrees

It becomes obvious that the oscillator is forced into a very unsatisfactory and unstable spurious mode when the drive winding is incorrectly phased, and will oscillate usually at a very high frequency. It will also be very susceptible to stray capacitance and circuit layout. It will act more like a Theremin in that just moving your hands around the unit will change the oscillation phase shift criteria and tend to prefer several different parasitic modes.

Why do we only find the spurious modes are very high in frequency?  Why do we not find low frequency spurious modes? The transformer phase shift is equally bad at both high and low frequencies?

The answer to this is that the frequency passband and efficiency of the transformer, especially small toroids as used in JT's falls off rapidly at low frequencies, therefore criteria #1 cannot be met. In other words there is not enough energy coupled through the transformer to provide sufficient drive to sustain oscillation at the lower frequency 180 degree phase shift mode.

There is one other problem that can cause a spurious low frequency oscillation, and that is a poorly decoupled power supply or voltage source that has some inherent time constants. For example, a poor battery that has high internal impedance will introduce an additional time constant with an input bypass capacitor. This will cause a phenomenon that we old radio men called "motorboating" where an oscillator or amplifier would exhibit a low frequency instability.

The point is, a properly constructed blocking oscillator, with correct polarity of drive winding is reasonably stable in frequency. It will prefer only one or two modes oscillation depending on initial bias adjustment and applied voltage, and usually the frequency is orders of magnitude lower than the spurious modes.

Typically, efficiency will fall off rapidly if the oscillator is forced into a spurious mode, as the transistor losses will increase greatly. Also the oscillator may be forced into a Class A mode, further aggravating losses.

The voltage input will affect frequency, generally, lowering the frequency with increased voltage applied, differing in this respect from a relaxation type oscillator which performs in reverse.

Note: pseudo-resonance mode is a complex method of timing a RCC or Ringing Choke Converter in a switchmode  circuit typically using a fairly complex integrated circuit as described in Panasonic's AN8029 app note. This is not an applicable term for use in a simple blocking oscillator circuit as there are no controls or timing circuits to produce the precise delay and inhibition periods required.

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For simplicity the circuit diagrams will be somewhat similar to the common Joule Thief, without optimized drive circuit enhancements, in this way they can be recognized as similar to the types that have been discussed elsewhere on the forum.

Here is the first method, using a simple means of capturing output energy and filtering it so it can be read on a simple DMM. Although discrete meters are shown in the schematics, they should be made with the same meter to consolidate error sources.

Note that the output is not referred to ground but is the pure capture of stored energy in the magnetic core. The output energy is easily filtered and averaged using a simple RC. I typically use 1uF and 1000 Ohms

Referencing to ground can be problematic if the driven device is a LED and the applied battery voltage exceeds the forward drop of the LED. A direct path will exist from the battery through the inductor to the LED.

In the preferred method, there is no such path to ground and all flyback energy is absorbed by the 100 Ohm resistor (minus diode and copper losses)

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For circuits where two secondaries are utilized the schematic can be expanded to include a second energy capture, filter and measuring means.

Note: I do not prefer using the 1.0 Ohm shunt resistor on the emitter return path, it is better placed in the battery positive lead.

I have placed it in the emitter to conform to the other JT under discussion elsewhere on the forum.