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Author Topic: Itsu's workbench / placeholder.  (Read 42349 times)

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I want this thread to use as a placeholder for some experiments i am doing, for experiments sprang of from other threads but being off topic or otherwise not wanted there,
or simply to drop some video's and pictures to be used by other members.

Itsu

   

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First here a video of an experiment looking for NMR in a iron powdered toroid done in cooperation with verpies.

No nmr (45.5Mhz) was seen using the procedures in the below video.

Suggestions are welcom.


Video:  https://www.youtube.com/watch?v=kiCp_90A9qk


Itsu
   

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Another experiment i am doing is about the anomaly Tinman showed in his Magnet/coil drive circuit here:
http://www.overunityresearch.com/index.php?topic=3684.0

Picture below shows the circuit with components.

Anomaly reported is that the average current through csr2 is always higher then the average current through csr1.

LTspice simulation shows this too, as well as a real life circuit.
LT spice shows this with run times below 1s, above 1s run times the difference is almost none.
Probably this has to do with the fact that around 1s capacitor C2 is charged to its max. but how this interacts with
the current through csr2 is one of the questions.

The idea is that the current should be the same or through csr1 slightly higher, due to losses, then through csr2.

LTspice sim file attached below  (using a floating FG, also in the real circuit)
LTspice sim picture below. (blue: csr2 current, green: csr1 current)
Screenshot life circuit. (yellow: csr1 current, blue: csr2 current).


Itsu
   

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The difference in the sim is the greatest when using a single cycle from Q1 Off to Q1 Off again,
see picture of 1 cycle with its average currents.

Itsu
   

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It's not as complicated as it may seem...
Itsu,

For your 200ms run, I'd say the two average currents are close enough to equal for government work.

See below for my results in pspice. (Blues is the base current trace)
   

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It's not as complicated as it may seem...
Power distribution in the circuit...

I don't know the specs of Brad's coil, so this is just a guess.
   

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Buy me some coffee
Another experiment i am doing is about the anomaly Tinman showed in his Magnet/coil drive circuit here:
http://www.overunityresearch.com/index.php?topic=3684.0

Picture below shows the circuit with components.

Anomaly reported is that the average current through csr2 is always higher then the average current through csr1.

LTspice simulation shows this too, as well as a real life circuit.
LT spice shows this with run times below 1s, above 1s run times the difference is almost none.
Probably this has to do with the fact that around 1s capacitor C2 is charged to its max. but how this interacts with
the current through csr2 is one of the questions.

The idea is that the current should be the same or through csr1 slightly higher, due to losses, then through csr2.

LTspice sim file attached below  (using a floating FG, also in the real circuit)
LTspice sim picture below. (blue: csr2 current, green: csr1 current)
Screenshot life circuit. (yellow: csr1 current, blue: csr2 current).


Itsu

Itsu

What if the transistor is swapped out for a mosfet ?
Would this then remove the base current input in question ?

Just a thought


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Dear Itsu

Could you explain why you were searching for NMR in a core in the manner described? What were the original thoughts or direction to proceed using the method shown in the video?

What are the conclusions from yourself and verpies on the negative outcome?

Thanks


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Itsu,

For your 200ms run, I'd say the two average currents are close enough to equal for government work.

See below for my results in pspice. (Blues is the base current trace)

Thanks Poynt99,

so these probe indicators on the diagram are from pspice.
I miss them in LTspice.

Anyway,  so you also see avg csr2 current being higher then avg csr1 current (nonsense_avg01.png).
By the way i have the FG (V2) return connected directly to Q1 emitter.

What about the Power distribution, i miss the csr1 power or do you use another point to show it?

I also see the csr3 power slowly increase still, would it be so that this level has to stabilize first
before the csr1 and csr2 currents are equal?

Itsu
   

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Itsu

What if the transistor is swapped out for a mosfet ?
Would this then remove the base current input in question ?

Just a thought

Brad,

there were a few remarks in your "non sense pulse motor" thread about that by ION, F6FLT and muDped.
I circumvent that (base current included in csr2 current) by using a floating FG which is across base and emitter
of Q1, thus its current is not running through csr2.

But i could try a MOSFET to see if it changes anything (some feedthrough through the shutdown Q1 transistor).

itsu
   

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Dear Itsu

Could you explain why you were searching for NMR in a core in the manner described? What were the original thoughts or direction to proceed using the method shown in the video?

What are the conclusions from yourself and verpies on the negative outcome?

Thanks


ION,

verpies asked me to do these tests on an iron powdered toroid related to this thread:
http://www.overunityresearch.com/index.php?topic=3689.msg70648#msg70648

Up till now i did not see any indiction of any 45.5mhz NMR using the shown procedures, but i know
that these kind of procedures are in need of being adjusted and refined which will take some time and efforts.

So any input on the used procedures are appreciated.

Itsu   
   

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It's not as complicated as it may seem...
Anyway,  so you also see avg csr2 current being higher then avg csr1 current (nonsense_avg01.png).
By the way i have the FG (V2) return connected directly to Q1 emitter.
Yes, CSR2 avg current is greater than CSR1, due to base current draw.

Quote
What about the Power distribution, i miss the csr1 power or do you use another point to show it?
You did not miss the CSR1 power. It is so small I omitted it.

Quote
I also see the csr3 power slowly increase still, would it be so that this level has to stabilize first
before the csr1 and csr2 currents are equal?

Itsu
CSR3 (the load) increases slowly yes, but it will have no effect on the CSR1/CSR2 differential.

Again, I don't see anything remarkable about CSR2 avg current being larger than CSR1's. Does anyone?
   

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Ok, how about my post #3, the difference in 1 cycle is about 38% higher avg current through csr2 then through csr1.

And i don't have any base current there as i use a floating FG across B/E.

Itsu
   

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It's not as complicated as it may seem...
Itsu,

One cycle, especially the very first cycle doesn't have much meaning in these measurements. What were are interested in are values in "steady/normal/running state", and we can't get those unless we take a large sample of cycles.
   

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Ok, we cannot in the sims, but we can in the real circuit, but then you cannot check/confirm it.

So the claim of csr2 having more average current then csr1 cannot be confirmed or denied.


Thanks,  Itsu
   

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Brad,

there were a few remarks in your "non sense pulse motor" thread about that by ION, F6FLT and muDped.
I circumvent that (base current included in csr2 current) by using a floating FG which is across base and emitter
of Q1, thus its current is not running through csr2.

But i could try a MOSFET to see if it changes anything (some feedthrough through the shutdown Q1 transistor).

itsu

Ok, i modified the sim to use a IRF530 MOSFET and things look better there, see picture below.

With only 1 cycle visible, (worse case with the transistor) i have almost equal avg currents through csr1 and csr2.

Will try tomorrow in the real circuit.

Itsu
   
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It's turtles all the way down
Itsu

Your posted pics of the sim and the .asc file are not quite in agreement. One shows 3V  for the FET, the other 5V.

I was not getting your waveforms, but changing the drive to agree with your posted picture (5V) solved that.

I would recommend you use 10V to drive the IRF530 as the gate threshold voltage of 2 to 4 volts only guarantees 250 uA drain current.

With 5 volts on the gate, you can't guarantee the FET is full on. ( ok in the sim but could be marginal on the bench) This would be especially problematic if the FG drive were not to the source but the other side of CSR2, which would degenerate the FET reducing the drive signal. Good that you are floating the FG and driving the FET directly, however be aware this also has it's own set of minor problems. (capacitance of the FG internal power supply to earth ground and noise that it may generate if it has a switchmode supply)

10 volts however will insure the FET is fully on and is the typical value used to specify full drain current on the data sheets.

Other thing is the run time is specified differently in the .asc file, but that is also easily changed by the user to 20m.

Regards
« Last Edit: 2019-01-17, 23:19:01 by ion »


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It's not as complicated as it may seem...
With your latest circuit, it works with one cycle, two cycles, or many cycles. The csr avg currents are always the equal.

However, be aware that if you increase C1 to 10,000u and only view the two pulses as you are above, the avg currents will not be the same because the current doesn't settle down to 0mA after each pulse like it does when C1 is 330u. This is one reason why we should almost always be using many cycles to allow the sim or scope compute a proper and accurate avg value.

The sim file posted above does not match with the picture or settings. I have made some adjustments to it (attached).

PS. I didn't see your post Ion, but yes good point on the drive voltage. I left it at 5V because it seemed to be switching ok. I just tried it with 10V and the results are pretty close (slightly higher avg current).
   

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It's not as complicated as it may seem...
Here is another go at the circuit. I changed the following:

1) period and PW are now 20ms and 1ms respectively, for a nice even number of cycles on the display.
2) ran the sim for 660ms, but set it to collect data only after 360ms, for a total display of 300ms worth of data.

See the .tran statement circled in red. I have also set a 10us limit to the step size for smooth data sampling. The reason I set the data collection for after 360ms, is to allow the circuit to stabilize or settle down to its normal running condition before we start collecting the data we are going to use for computations. This eliminates any transient or charging conditions exhibited by the circuit after it is first energized. This is one of the reasons the avg currents in csr1 and csr2 can be different, even with many samples on the display.

The avg currents are now equal, regardless how many cycles you run. Change the run time to 400ms to show only two pulses if you wish, and the avg currents will still be equal.
   
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It's turtles all the way down
Good work guys

Simple question from one noob such as I that is not too acquainted with the nuances of LTSpice.

How do you get two or more power windows to stay up as Itsu did? I can get one, but must exit it to be able to cntrl/left click the other trace to get it to display. I see nothing in the help file. (maybe I'm not looking in the right area)

I must close the first waveform box in order to open the second or LTSpice beeps at me to close the first.

Using XP. and LTSpice IV

Thanks in advance.


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It's not as complicated as it may seem...
I have the same question Ion.

The only thing I can think of is perhaps that capability is in a newer version than I have. I guess we will see what Itsu says. ;)
   

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Itsu

Your posted pics of the sim and the .asc file are not quite in agreement. One shows 3V  for the FET, the other 5V.

I was not getting your waveforms, but changing the drive to agree with your posted picture (5V) solved that.

I would recommend you use 10V to drive the IRF530 as the gate threshold voltage of 2 to 4 volts only guarantees 250 uA drain current.

With 5 volts on the gate, you can't guarantee the FET is full on. ( ok in the sim but could be marginal on the bench) This would be especially problematic if the FG drive were not to the source but the other side of CSR2, which would degenerate the FET reducing the drive signal. Good that you are floating the FG and driving the FET directly, however be aware this also has it's own set of minor problems. (capacitance of the FG internal power supply to earth ground and noise that it may generate if it has a switchmode supply)

10 volts however will insure the FET is fully on and is the typical value used to specify full drain current on the data sheets.

Other thing is the run time is specified differently in the .asc file, but that is also easily changed by the user to 20m.

Regards


ION,

sorry for the mismatch between .asc file and picture, guess i did not save the .asc file after making changes.
I to had problems with the 3V initially to get the MOSFET switching, so i changed it to 5V.

I did not want to go higher (like 10V) as my floating real life FG cannot go higher then 5V dc (10pp).

Also the runtimes changed (but did not save either) to check if the equal avg currents stay equal over several run times.

Concerning the "two or more power windows" you and Poynt are wondering about, this is not possible in LTspice it seems,
so i made a copy of the LTspice screen (alt-PrtSc on your keyboard) and paste it into Paint.net, then put up 1 "power window", again do
alt-PrtSc (now it ONLY copies this little power window), do a "paste as new layer" (not sure if thats how it called
in an English version of paint.net), move it to where you want it, then repeat this for the other "power window".
Save the picture as a .png file and it will ask to merge the layers and whalla.

Itsu

 
   

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With your latest circuit, it works with one cycle, two cycles, or many cycles. The csr avg currents are always the equal.

However, be aware that if you increase C1 to 10,000u and only view the two pulses as you are above, the avg currents will not be the same because the current doesn't settle down to 0mA after each pulse like it does when C1 is 330u. This is one reason why we should almost always be using many cycles to allow the sim or scope compute a proper and accurate avg value.

The sim file posted above does not match with the picture or settings. I have made some adjustments to it (attached).

PS. I didn't see your post Ion, but yes good point on the drive voltage. I left it at 5V because it seemed to be switching ok. I just tried it with 10V and the results are pretty close (slightly higher avg current).


Poynt99,

i was using the 10000uF C1 (and 470uF C2) already when using the transistor, so the only change was the MOSFET.
Still there is a noticable change in currents  between csr1 and csr2 (equal with MOSFET,  difference with transistor)

Thanks for the new .asc file, i will download it later today and check.

First look at my real life circuit using a IRF530 MOSFET still shows some difference between csr1 and csr2 currents
(55mA / 60mA), but will do some further tests (more or less cycles etc.) later today.

Itsu
   
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Just a little digression. I redrawn the circuit in a form more familiar to me, and often used by electronics engineers for simple assemblies. Functionally it is exactly the same.

It's amazing how one can have a mind distorted by habits: the redrawn scheme seems to me to be clear and straightforward, immediately understandable, whereas I had to think a lot more about the first drawing! 


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Just a little digression. I redrawn the circuit in a form more familiar to me, and often used by electronics engineers for simple assemblies. Functionally it is exactly the same.

It's amazing how one can have a mind distorted by habits: the redrawn scheme seems to me to be clear and straightforward, immediately understandable, whereas I had to think a lot more about the first drawing!

F6FLT

I am in complete agreement. There is a convention of form in drawing circuits, left to right signal flow, top and bottom rails etc.
that makes them easy to understand.

Regards


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