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Author Topic: Graham Gunderson Energy conference High COP demonstration  (Read 154497 times)
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From GG's demonstration of a sawtooth flux waveform I have taken the primary current waveform then deduced the secondary current needed to create that sawtooth, assuming normal transformer action where the flux comes from the difference between pri and sec ampere turns.  Done crudely from my sketched waveforms.  And I get a secondary current very much like that shown by GG.  So I deduce that there is no significant flux leakage and my original estimate of the primary flux waveshape is wrong.

Smudge

Dear Smudge,

You may have calculated no significant flux leakage from your analysis of the scope traces, but Graham was quick to point out to me that there is a lot of leakage where there shouldn't be. As I mentioned in a post a few weeks ago, he built little RF probes to explore the degree of leakage and was amazed at all the energy circulating around the outside of his core. Now that would be something interesting to see in itself.

I think it is vital to have on hand good classical analysis of this apparatus and then be able to compare those numbers to what we actually get. It is the differences that might help improve our search for the seat and the process of the non-classical conversion.

Spokane1
   
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TK said:

Quote
It is far simpler and generally more precise to use a properly-arranged Current Viewing Resistor and monitor the Vdrop across that item with ordinary passive probe(s) or a specially constructed Kelvin probe arrangement. If signal isolation is a problem during simultaneous measurements of V and I,  there are various ways around that.

I agree, the CVR can be built into a test setup and give good repeatable results unlike the TEK current probes I have used, where just a little speck of dirt in the gap or improper closure can throw the reading way off. Maybe the newer ones are better. I'm too old to keep up.  :-[

Spokane1 said:
Quote
As I mentioned in a post a few weeks ago, he built little RF probes to explore the degree of leakage and was amazed at all the energy circulating around the outside of his core. Now that would be something interesting to see in itself.

I don't doubt that he would pick up a lot with an RF probe and at a good distance due to the fast switching transients. I'm sure there was a lot of radiated EMI. As you already know, straight magnetic leakage is a different animal, and a good magnetic probe will be shielded against RF.

Regards, ION

P.S. A good article on constructing RF sniffer probes: http://electronicdesign.com/components/simple-homemade-sensors-solve-tough-emi-problems
« Last Edit: 2016-08-16, 01:47:56 by ION »


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"Secrecy, secret societies and secret groups have always been repugnant to a free and open society"......John F Kennedy
   

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In Graham's presentation the operation of the synchronous diode on the secondary current is profound.
Perhaps the gate current adds to the secondary current.

   
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Dear All,

Here is a source of inexpensive bias ferrite magnets.

Spokane1
« Last Edit: 2016-08-16, 16:45:38 by Spokane 1 »
   
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Here is yet another circuit variation to Graham's demo device that is best described as an unbalanced current driven parallel resonant inverter with clamp phase. IMO, this would be an excellent alternative to a full H bridge circuit and the primary switching is ground referenced.

The first pix shows the schematic and plot with some .meas math to show the overall COP from supply to output.

The second pix is a rather busy plot with the various branch power measurements.

The third pix is a simplified plot showing the differential voltage across the primary L4, the power across L4, the current thru L4, and mostly resembles Graham's primary waveforms.

pm   
   
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Good work, pm, and within reach of the average builder without exotic ferrites and magnets.

I do like this approach, and later, for fun, other ferrites and magnets can be tried once the basic driving circuit is built.

Regards, ION


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"Secrecy, secret societies and secret groups have always been repugnant to a free and open society"......John F Kennedy
   
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Perhaps the gate current adds to the secondary current.

Dear verpies,

I'm sure there is some leakage we need to be aware of, but the current doesn't increase it decreases because it is being directed into that large backend storage capacitor, probably along with what ever energy escapes from the gate excitation signal.

In my simulations, with an ideal transformer, this sudden drop in secondary current doesn't happen and I wonder why.

Do you happen to know what the magnitude and the wave form would be for gate leakage energy into the Drain-Source Circuit? Are we looking at 30 milliwatts or 300 milliwatts? I suppose it would be similar to a parasitic capacitor of some fixed value. I also suppose that it could be simulated with a capacitor between the gate and the drain.

From the presentation, the green trace is the secondary current. It appears to take a sudden dump when the harvest pulse is triggered, and then takes some time to recover while the primary current is clamped at a constant value. Something interesting is happening there. I suspect this is the result of the saturated core condition.

Photo provided by Reiyuki from the presentation.

Spokane1
   
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Here is yet another circuit variation to Graham's demo device that is best described as an unbalanced current driven parallel resonant inverter with clamp phase. IMO, this would be an excellent alternative to a full H bridge circuit and the primary switching is ground referenced.

The first pix shows the schematic and plot with some .meas math to show the overall COP from supply to output.

The second pix is a rather busy plot with the various branch power measurements.

The third pix is a simplified plot showing the differential voltage across the primary L4, the power across L4, the current thru L4, and mostly resembles Graham's primary waveforms.

pm   

Dear PM

Would you be so kind as to post a trace from you detailed simulation to show just the primary tank voltage (for reference) with the secondary current.  My tired eyes are having difficulty sorting out the important information (for me) from all the supporting traces.

Thank you in advance.

Spokane1
   
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Dear PM

Would you be so kind as to post a trace from you detailed simulation to show just the primary tank voltage (for reference) with the secondary current.  My tired eyes are having difficulty sorting out the important information (for me) from all the supporting traces.

Thank you in advance.

Spokane1

Sure. Below is a plot that shows the differential input tank voltage across L4 and the output current thru the secondary L5. I also left the current thru L4 for reference.

I basically see the same results as your are getting on your simulation regarding the input and output currents. Any change in the secondary current is mirrored in the primary unlike Graham's circuit. IMO, only after we add the nonlinear core and PM bias perhaps we'll see the magnetic separation between the two cores. Also, my off time for M3 is 1us but if made long enough, the currents will reverse.

I will also add that during the clamp time in Graham's device when the primary current is basically frozen and the secondary current and flux reverse direction, there are bucking currents in the coil windings that will produce H fields between the core legs and outside the core legs. IMO, these are the fields that Graham has seen with the sensing coils.   

At present, I'm attempting to gain enough info to model the upper core half using the gyrator-capacitor approach. The sticky part is modeling the nonlinear B/H curve and the proper hysteresis loop for the material used.  BTW, are you an IEEE member?

pm

Edit: Changed "bucking fluxes " to "bucking currents in the coil windings".
   

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From the presentation, the green trace is the secondary current. It appears to take a sudden dump when the harvest pulse is triggered, ...
...
In my simulations, with an ideal transformer, this sudden drop in secondary current doesn't happen and I wonder why.

I don't think it is a sudden drop but a current reversal due to half a cycle of high frequency LC oscillation. 

When the "synchronous diode" opens, the capacitance in series with the transformer's inductance drops precipitously and increases the LC frequency of whatever remains in that "open" circuit.
This is why adding a 10nF capacitor across the "synchronous diode" lowers the frequency of this LC oscillation, so the current can no longer reverse in the 1μs allotted by the "synchronous diode".

Do you happen to know what the magnitude and the wave form would be for gate leakage energy into the Drain-Source Circuit? Are we looking at 30 milliwatts or 300 milliwatts?
The current flowing due to the MOSFET's Gate Leakage is proportional to the voltages & frequencies appearing between the gate and drain/source terminals.  For example, the reactance of a 500pF capacitance @ 1MHz is 318Ω.

If you have the drain swinging by 600V with respect to the gate, then the instantaneous power transfer across that 318Ω reactance will be 1131W.
If that 600V swing happens only 0.5% of the total cycle time, then the average power transferred by that capacitive reactance will be 5.6W.

I suppose it would be similar to a parasitic capacitor of some fixed value. I also suppose that it could be simulated with a capacitor between the gate and the drain.
The MOSFET capacitances are not constant!  They vary with voltage... and the Miller's capacitance (CDG) is subject to a transconductance multiplication. 
Because of these reasons these capacitances cannot be simulated with fixed capacitors.  It is better to build a mock-up of a secondary circuit and measure the currents empirically there (or in a sim with a good MOSFET model) where the MOSFETs are subjected to high dv/dt  conditions.
   
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I don't think it is a sudden drop but a current reversal due to half a cycle of high frequency LC oscillation. 

When the "synchronous diode" opens, the capacitance in series with the transformer's inductance drops precipitously and increases the LC frequency of whatever remains in that "open" circuit.
This is why adding a 10nF capacitor across the "synchronous diode" lowers the frequency of this LC oscillation, so the current can no longer reverse in the 1μs allotted by the "synchronous diode".
The current flowing due to the MOSFET's Gate Leakage is proportional to the voltages & frequencies appearing between the gate and drain/source terminals.  For example, the reactance of a 500pF capacitance @ 1MHz is 318Ω.

[/color].

Dear verpies,

That sounds like a reasonable mechanism to explore. I shall ponder your process proposal. Thank you for the idea.

In my simulation I'm using a 150 nS harvest capture pulse. I can't expand the trace at the moment but if you could zoom into the transition zone of the secondary current you would see that it quits changing only after about 50 nS. In this imaginary circuit any capture pulse longer than 50 ns will not yield additional current for the backend filter capacitor.

So you are using a 1 microsecond capture pulse, If I understand you correctly?

Spokane1
   
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I will also add that during the clamp time in Graham's device when the primary current is basically frozen and the secondary current and flux reverse direction, there are bucking currents in the coil windings that will produce H fields between the core legs and outside the core legs. IMO, these are the fields that Graham has seen with the sensing coils.   


Actually, the more I think about my statement above, I believe it is incorrect. The physical structure of G's core assembly would have bucking currents normally in loaded operation so H fields should be present in and around the cores most of the time.

pm
   
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Here is yet another circuit variation to Graham's demo device that is best described as an unbalanced current driven parallel resonant inverter with clamp phase. IMO, this would be an excellent alternative to a full H bridge circuit and the primary switching is ground referenced.

The first pix shows the schematic and plot with some .meas math to show the overall COP from supply to output.

The second pix is a rather busy plot with the various branch power measurements.

The third pix is a simplified plot showing the differential voltage across the primary L4, the power across L4, the current thru L4, and mostly resembles Graham's primary waveforms.

pm   

I think it is very interesting (and hilarious!) that you have almost exactly duplicated the primary-side circuit of my microQEG now. 

   
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I think it is very interesting (and hilarious!) that you have almost exactly duplicated the primary-side circuit of my microQEG now.

Dear TK,

Would your front end circuit work in this application? Would it be cheaper? faster? more current capacity? easier to build?

I certainly am not concerned with what kind of circuit drives the Conversion Transformer. k4zep is considering using a fast SCR, which will probably work fine. I'm also not so sure that $70 SiC power MOSFET's are needed for the front end either.

But I shall have to get my setup up and running before I can definitively address these questions.

It is nice to see that great minds are moving in the same direction.

Spokane1



   
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In confirming the branch currents and power levels in the GG6 device I posted in message #404, I discover that the device does not yield negative power in the primary as the measurements would suggest. Again when power polarities are carefully considered at each node, the power in the primary is positive and therefore the design is not a candidate for replicating Graham's device IMO.

Although I carefully checked the GG3 device, I'm presently in the process to confirm that it does have a net negative energy in the primary as the measurements seem to indicate.

Sorry for the distraction. :(

pm 
   
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In confirming the branch currents and power levels in the GG6 device I posted in message #404, I discover that the device does not yield negative power in the primary as the measurements would suggest. Again when power polarities are carefully considered at each node, the power in the primary is positive and therefore the design is not a candidate for replicating Graham's device IMO.

Although I carefully checked the GG3 device, I'm presently in the process to confirm that it does have a net negative energy in the primary as the measurements seem to indicate.

Sorry for the distraction. :(

pm

As best I can tell at the moment, the GG3 circuit I originally posted on reply #386 does indeed have a net negative reactive input across the primaries over one complete cycle as it stands. I would certainly like confirmation whether my analysis is correct or incorrect so it can be determined if the device is worth pursuing.

pm
   
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Dear TK,

Would your front end circuit work in this application? Would it be cheaper? faster? more current capacity? easier to build?

I certainly am not concerned with what kind of circuit drives the Conversion Transformer. k4zep is considering using a fast SCR, which will probably work fine. I'm also not so sure that $70 SiC power MOSFET's are needed for the front end either.

But I shall have to get my setup up and running before I can definitively address these questions.

It is nice to see that great minds are moving in the same direction.

Spokane1
Partzman's GG3 voltage sources V7 and V3, which drive the gates in his primary circuit, are rectangular-pulsed sources with different ON-time parameters. See the netlist items below.

My apparatus uses a symmetrical, sinusoidal gate drive, and is auto-resonating at the LC tank frequency rather than having its timing set by external gate drive pulses. Is this applicable to the Gunderson issue? Well, I don't know but maybe, since it can produce a "zero" or very close to zero "input power" at the primary coil of the air-core loosely coupled output transformer. I've also gotten some amazing results by assembling a CRT yoke ferrite core around/through the device's primary coil, with a many-turn secondary wound onto half of the ferrite yoke, and generated some very high currents that way, enough to sustain quite a hot arc. My apparatus runs on 12-18V DC input and is entirely self-oscillating, doesn't need any external clocks. Although I suppose an interrupter could be installed that would allow the "dead time" interval seen in Gunderson's waveforms.

As far as cost, this would be set by the price of the mosfets and the magnetics, mostly, I should think. Faster? Again, my circuit's frequency can be set by the LC parameters, and can be anywhere from, say, 20 kHz up to about 1 MHz. Of course as the frequency goes up more care needs to be taken with layout and construction. More current capacity? Depends on mosfets. Easier to build? Easier than the original Gunderson circuit, probably. No SMD components or unobtanium ferrites used, "printed" circuit board so simple it's actually funny. See the attached template.

You don't believe in the magic of 70 dollar SiC mosfets? That's funny.... neither do I !     :D
   
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As best I can tell at the moment, the GG3 circuit I originally posted on reply #386 does indeed have a net negative reactive input across the primaries over one complete cycle as it stands. I would certainly like confirmation whether my analysis is correct or incorrect so it can be determined if the device is worth pursuing.

pm

How did you do your analysis? Walk me through it.

I'm estimating about 0.266 W average input power from the 20V source, and about 0.231 W average power dissipated in the 50R load resistor.
   

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Quote from: TinKoa
You don't believe in the magic of 70 dollar SiC mosfets? That's funny.... neither do I !     :D

Back in the Old Days we used a Carborundum Crystal and a D Cell
for "bias" in some of our Crystal Radios.  Weren't any magic there
either... :'(  C.C  :o

Maybe the "magic" is in the selling of those unusual parts and related
"secrets of" manuals/videos to the eager "builders" in order to reap the
"free energy" of easy profits. 8)  ;)



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A man gets depressed, he gets sad, he thinks about quitting and folding, but he never does. He pushes through adversity. - Chad Howse
   

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So you are using a 1 microsecond capture pulse, If I understand you correctly?
Yes. This period was chosen based on statements made by GG  in his MIT video.
   
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It's turtles all the way down
Back in the Old Days we used a Carborundum Crystal and a D Cell
for "bias" in some of our Crystal Radios.  Weren't any magic there
either... :'(  C.C  :o

Maybe the "magic" is in the selling of those unusual parts and related
"secrets of" manuals/videos to the eager "builders" in order to reap the
"free energy" of easy profits.
8)
  ;)

You think?   :-X  :o  ;)

https://en.wikipedia.org/wiki/Silicon_carbide

Illegitimi non carborundum  ;)

https://en.wikipedia.org/wiki/Illegitimi_non_carborundum




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How did you do your analysis? Walk me through it.

I'm estimating about 0.266 W average input power from the 20V source, and about 0.231 W average power dissipated in the 50R load resistor.

TK,

OK, here is my analysis as you requested. There are some minor changes to my original post that is, C4 is now .0024ufd and the stabilization run time is 9ms instead of 4.5ms so there may be slight result differences from the original.

The first pix is the plot and math for the V(Ecap) portion of a cycle. I wish I had removed the extra traces for clarity but the results are the same. For those who may not know, the conventional current flow (positive to negative) in LtSpice is toward the dotted end of an inductor. So, we see 406.52mW (average power) entering node Etap.

The power across L4 is calculated by (V(etap)-V(ecap2))*I(L4) and results in -404.87mW. Since current flow in an inductor in LtSpice is measured toward the dot, the negative result means that the current flow is in the opposite direction or away from the dot.  Therefore, there is actually 404.87mW leaving node Etap.

The power across L2 is calculated by (V(etap)-V(ecap))*I(L2) and results in -1.4297mW. This value does not satisfy the power balance at node Etap due to slight errors in the sim's math calcs IMO, but the amount is small enough to ignore for now.

The basic point from the first test is that we have ~405mW average across the primary from the dot to non-dot polarity.

The second pix is the same basic test done on the V(Ecap2) portion of the cycle. Without all the explanation, we can see that in general we have a near balance 398.95mW leaving node Etap. This ~400mw however in this cycle is across the primary from non-dot to dot polarity which is opposite the V(Ecap) measurement.

The results from above are what I used to conclude that the average reactive power in the primary of this device is near zero. The above measurements do not reflect the entire cycle however and that is done below.

The third pix is a full cycle plot stripped of everything except the power averages for DC input, reactive input, and resistive output and indicates an approximate -10mW net reactive input.

I welcome any and all corrections and/or comments.

pm

   
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One aspect of normal transformer operation that is overlooked is the difference between current driven (from a high impedance source) and voltage driven (from a low impedance source).  We are used to power transformers that are voltage driven.  The flux in the transformer is then directly related to the voltage, it doesn’t change with the load (well not by much and you can put that deviation down to the primary coil resistance which causes the coil voltage to vary slightly with load-current drawn).  The input voltage determines the flux and the magnetizing current.  As you change the load (let’s say it is an increasing load as you lower the load resistor) you get more secondary current and the internal magnetics of the transformer cause the primary load current to increase accordingly so that the two load currents balance out wrt flux generation.  This current-balancing act becomes clear when you analyse the transformer in the magnetic domain where the mmf’s automatically balance.  The point I am making is the fact that the voltage is the driver for the flux, not the current, and in normal transformers there is a current-balancing act that ensures the primary and secondary load ampere-turns balance.

Now what makes GG’s transformer different is that the primary is not directly connected to a low impedance source, IMO there is a series capacitor in there.  Also, unlike normal transformers, the flux is determined by the secondary voltage, not the primary voltage.  The secondary is connected via synchronous rectification switches to an effective low impedance that is the DC smoothing capacitor, so it is held at a fixed DC voltage for most of the cycle.  Only over the small “off” region is it disconnected whence the voltage rings up to a high value narrow spike.  So that switching on the secondary, and the DC voltage on the capacitor, is the driver for the flux.  GG demonstrates this sawtooth flux waveform by integrating the secondary voltage.  It is that sawtooth flux that becomes the system driver, and the primary and secondary currents adjust to make sawtooth that happen.  Of course the primary current is influenced by the fact that there is a peculiar voltage waveform on the input side of the series capacitor.  And the current-balancing act is also influenced by the non-linear nature of the core biased at its knee.  With a non-linear core driven with a flux waveform, the mmf drop across the core reluctance does not follow that waveform, so you get anomalous mmf, and mmf is current by another name.  The non-linear core is pumping anomalous mmf that influences the primary and secondary current balance that would normally ensure a COP close to unity.  So it could be possible that the GG transformer is genuinely COP>1.

Smudge
   
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For those who have not seen my paper on magnetic domain analysis here is a copy.

Smudge
   
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@partzman: Thanks for those plots and the explanation.

For me, the bottom line is that my input and output power estimations agree with your results quite closely.

For the input power from the main DC power supply  I(L1)*V(etap) you have 262.23 mW average, and I estimated 266 mW average "by eyeballing".
For the output power dissipated in the 50R load resistor V(outcap)2/50 you have 227.14 mW average (the "V2"units on the plot are wrong because you simply used a constant "50" instead of specifying that is a resistance in Ohms, which of course should have resulted in an answer in units of Watts instead of V2.) And I estimated 231 mW average by eyeballing. Not bad for the old Mark I eyeballs!

I'm guessing that the difference is taken up in power dissipation in the resistances of the coils and mosfets.


What happens to the reactive power result if you equalize the "on" duration of the gate voltage sources V7 and V3?

That is, for V7 use
PULSE(0 15 0 20ns 20ns 20us 30us)
and for V3 use
PULSE(0 15 10us 20ns 20ns 20us 30us)

   
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