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Author Topic: Don Smith Akula, Ruslan, Stalker, device discussion and replications.  (Read 47939 times)
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #519 on: 2023-08-24, 17:19:53 »


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Quote from: AlienGrey on 2023-08-12, 15:22:19
...and you don't need all those op amps
So how would you drive the TL494 with the 74HC4046 without these op-amps ?

Quote from: AlienGrey on 2023-08-12, 15:22:19
and it doesn't take into account the propagation delay  of the gate drivers or the mos FETs
Actually a PLL can compensate for any delays, as it will adjust its VCO to keep the signals at its phase comparator in-phase.  If one of these signals is picked up after the MOSFET, then the delay introduced by the MOSFET will be compensated for as well.
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #520 on: 2023-08-24, 18:23:11 »


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I wouldn't do it like that, I think I would have the 494 free running and lock the 4096 to 50 times the 494 and use the output of the vfo to drive the
tesla or HF HV generator. it does work because i have run tests with a SG and scope.
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #521 on: 2023-08-25, 19:31:42 »


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   AG:
   Then why don't you do that???
Or is this all theoretical?

   NickZ
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #522 on: 2023-08-25, 20:32:30 »
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"By the way, now, for a first time you see my apparatus om Houston street, which I used for obtaining oscillations, damped and undamped as well . But it was necessary to state that while others, who had been using my apparatus, but without my experience, have produced with it  damped oscillations, my oscillations were almost invariably continuous, or undamped, because my circuits were so designed that they have a very small damping factor. Even if I operated with very low frequencies, I allways obtained continuous, or undamped, waves for the reason that I designed my circuits as nonradiative circuits." : Nikola Tesla

I conclude that the essence was in construction of device which oscillate even if powered by very low frequencies
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #523 on: 2023-08-25, 22:13:41 »


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Quote from: NickZ on 2023-08-25, 19:31:42
   AG:
   Then why don't you do that???
Or is this all theoretical?

   NickZ
Nick if you go back a few posts Max posted a Igorek PLL circuit all you have to do is add a Divider
Itsu was talking about between 3 and 4 on the 4046. You can do that can't you you have a scope and a SG
good luck i'm sure that the 4046 section can be got to work, give you some thing to do.  :)

regarding your device, are you going to buy Rick Rich's Don Smith book?
Well can you let us all know the secret once you find out ?  ;D
« Last Edit: 2023-08-26, 11:24:44 by AlienGrey »
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #524 on: 2023-08-25, 22:15:48 »


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Quote from: forest on 2023-08-25, 20:32:30
"By the way, now, for a first time you see my apparatus om Houston street, which I used for obtaining oscillations, damped and undamped as well . But it was necessary to state that while others, who had been using my apparatus, but without my experience, have produced with it  damped oscillations, my oscillations were almost invariably continuous, or undamped, because my circuits were so designed that they have a very small damping factor. Even if I operated with very low frequencies, I allways obtained continuous, or undamped, waves for the reason that I designed my circuits as nonradiative circuits." : Nikola Tesla

I conclude that the essence was in construction of device which oscillate even if powered by very low frequencies
What are you talking about ?
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #525 on: 2023-08-25, 22:17:21 »


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just listen to this vid till the end >>>>> https://www.youtube.com/watch?v=JrAf0AD-lWU
        
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #526 on: 2023-08-26, 21:06:04 »


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I received my SN74LS56P 50:1 divider chip and was trying to get it to work, but without success.

As can be seen in the attached datasheet, i hooked up a 1250kHz clock signal from my FG (5V DC @ 50 duty cycle) to the CLKA input pin 5.
There was +5V on Vcc pin 2 and ground on pin 4
Qa output (pin 3) was directly connected to the CLKB input pin 1.
But on Qc output pin 8 there was no visible divided signal present (nor on Qb output pin 7 nor on Qa output pin 3).
CLR pin 6 was tight to ground.

The 5V DC input clock signal collapses to 1.5V when attached to the pin 5, so probably this input is too low for the chip to function, but increasing the FG setting to 10V DC makes no difference.

I have 2 chip each behaving similar, so either i have 2 defective chips, or both are counterfeit parts.

I will fiddle around with these chips somewhat longer, but probably have to return to the earlier used 50:1 divider setup.

Itsu
------------------------
* 74LS56P.PDF (309.64 kB - downloaded 65 times.)
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #527 on: 2023-08-26, 23:17:25 »


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Quote from: Itsu on 2023-08-26, 21:06:04
I hooked up a 1250kHz clock signal from my FG (5V DC @ 50 duty cycle) to the CLKA input pin 5.
Verify with a highZ probe and your scope that this signal from the FG really swings from 0V to 5V when not connected to the chip.
Sometimes the FG displays 5V but the amplitude is much higher and damages chips.  This happens because the FG makes its amplitude calculation based on an expectation of a 50Ω load.
     
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #528 on: 2023-08-27, 10:02:49 »


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Itsu that 50 to 1 chip is an old chip and its not 50/50 EW output and you need 2 clocks for it and other support chips

Whats wrong with the the 4017 will work if you configure it right you just need 2 nothing else.

Do you want me to list the pin out connections  for you ?
------------------------
Divide bt 50 4017 ew.png
* Divide bt 50 4017 ew.png (8.01 kB, 329x233

   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #529 on: 2023-08-27, 11:28:58 »


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Quote from: verpies on 2023-08-26, 23:17:25
Verify with a highZ probe and your scope that this signal from the FG really swings from 0V to 5V when not connected to the chip.
Sometimes the FG displays 5V but the amplitude is much higher and damages chips.  This happens because the FG makes its amplitude calculation based on an expectation of a 50Ω load.

I measured the 5V pulse from the FG, and it shows in the screenshot in the blue trace.
When connecting this pulse to the CLKA input (pin 5) via a 1K resistor, it collapses as shown in the yellow trace and this is with or without power (5V) on the chip).

 
So i doubt if the pinout as shown in the datasheet is correct (or the pinout of the chips i have are correct).

Itsu
------------------------
7456 chip input.png
* 7456 chip input.png (26.78 kB, 800x600 - viewed 296 times.)
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #530 on: 2023-08-27, 11:34:24 »


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Quote from: Itsu on 2023-08-27, 11:28:58
I measured the 5V pulse from the FG and it shows in the screenshot in the blue trace.
When connecting this pulse to the CLKA input (pin 5) via a 1K resistor, it collapses as shown in the yellow trace and this is with or without power (5V) on the chip).

 
So i doubt if the pinout as shown in the datasheet is correct (or the pinout of the chhips i have are correct).

Itsu
well you have don it! so will a 74HC390  and might be easier to get but 16 pin
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #531 on: 2023-08-27, 12:13:22 »


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Quote from: AlienGrey on 2023-08-27, 10:02:49
Itsu that 50 to 1 chip is an old chip and its not 50/50 EW output and you need 2 clocks for it and other support chips

Whats wrong with the the 4017 will work if you configure it right you just need 2 nothing else.

Do you want me to list the pin out connections  for you ?

AG,

an LTspice simulation (attached) of your circuit shows it works, but as a 100:1 divider, so something is wrong still, but close.

Itsu
------------------------
* AG divider 50 to 1.asc (1.08 kB - downloaded 8 times.)
AG 50 -1 divider.png
* AG 50 -1 divider.png (45.85 kB, 1902x901 - viewed 241 times.)
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #532 on: 2023-08-27, 13:35:37 »


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No; some thing wrong on RS line, ist chip must be / by 5 = 300 khz
you must have it / by 10 is wrong.

I have it on the bench now 1.5 mhz in first 4017 13 to 15 and pin 1 = / by 5 = 300khz on pin 10

Then next 4017 / by 10 = 30 khz works on bench here. gives pure sqr wave

Sorry missed pin 1 output  O0
|Sil

note 555 does nothing
------------------------
Divide bt 50 4017 ew pcb.png
* Divide bt 50 4017 ew pcb.png (341.11 kB, 452x445 - viewed 219 times.)
Divide bt 50 4017 ew.png
* Divide bt 50 4017 ew.png (8.01 kB, 329x233 - viewed 206 times.)
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #533 on: 2023-08-27, 13:42:55 »


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Sorry missed out pin 1 to rest chip at 5 on first 4017.
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #534 on: 2023-08-27, 18:34:34 »


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OK, thats better, but now i have a 40:1 divider.

Pin 10 is Q4 which is a times 4 divider, so i need times 5 thus Q5 which is pin 1.
Therefor the Reset moves to Q6 pin 5.

Now i have a 50:1 divider using your circuit, 1250kHz in, 25kHz out.

I will build it now.

Itsu
------------------------
AG 50 to 1 divider corrected.png
* AG 50 to 1 divider corrected.png (63.67 kB, 1910x902 - viewed 39 times.)
« Last Edit: 2023-08-27, 19:39:14 by Itsu »
        
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #535 on: 2023-08-27, 20:57:59 »


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Ok, that worked out fine, 50:1 divider by 2x CD4017.

Itsu
------------------------
AG 50 to 1 divider real.png
* AG 50 to 1 divider real.png (44.75 kB, 800x600 - viewed 42 times.)
        
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #536 on: 2023-08-27, 21:07:22 »


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   The best conversation you guys have had in years.
   Good to see it...

     NickZ
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #537 on: 2023-08-28, 02:05:47 »


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 :D u2 is set up as  a ring counter, therefor with the reset jumpered to pin 1` as in the circuit diagram
once started all the outputs below q5 and q5 will divide by 5 as it's counting in a ring. So q6 and above will have no output, but the carry will be a sqr wave as is.

regards

Sil
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #538 on: 2023-08-28, 10:00:12 »


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Well done @ Itsu and AG for diversifying . It is high time we think outside the box. Just as said before, the originators only gave us clues and not the exact thing. There are many routes to the stream and this is one.  A cascaded decade counter is a sure way to get 50th sub-harmonic frequency as we are seeing now when used in "divide by" arrangements. In order to remove noise, please, connect pin 13 through a pull down resistor of 1meg to the ground and pin 15 through 100k to the ground. This will help from stray switching .

Maxolous
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #539 on: 2023-08-28, 13:19:22 »


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Quote from: Maxolous on 2023-08-28, 10:00:12
Well done @ Itsu and AG for diversifying . It is high time we think outside the box. Just as said before, the originators only gave us clues and not the exact thing. There are many routes to the stream and this is one.  A cascaded decade counter is a sure way to get 50th sub-harmonic frequency as we are seeing now when used in "divide by" arrangements. In order to remove noise, please, connect pin 13 through a pull down resistor of 1meg to the ground and pin 15 through 100k to the ground. This will help from stray switching .

Maxolous
Hi Max can you scribble on the circuit to show what you mean as both chips behave differently regards Sil
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #540 on: 2023-08-28, 20:35:45 »


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Back to the SN74LS56 chip which i still did not get to work.

Looking at the data sheet PDF attached earlier, i think it might have something to do with the CLR pin 6.

Presently i have it tied to ground permanently, but it might need to be triggered somehow.
As i can not find any diagram which uses this chip i have no example how it should be used and the data sheet is no help either.

I will try some timed pulses on that CLR pin to see if it activates the outputs.

Itsu
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #541 on: 2023-08-28, 23:31:17 »


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74LS56 Key Features & Specifications
Supply Voltage 5V
VIH – High-level input Voltage 2V
VIL – Low-level input Voltage 0.7V
Maximum current allowed to draw through each gate output: 8mA
IOL (Max): 16mA
IOH (Max): -1mA
Clock frequency 15MHz
TTL outputs
Low power consumption
74LS56 Pinout
Pin Name   Pin No.   Description
CLK B   1   Clock input B
Vcc   2   Chip Supply Voltage
Qa   3   Chip Output A
GND   4   Ground
CLK A   5   Clock input A
CLR   6   Clear pin
Qb   7   Chip Output b
Qc   8   Chip Output c
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #542 on: 2023-08-29, 19:42:15 »


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Partly typing over the earlier linked datasheet does not help here.

What i am looking for is the relationship of the CLR signal compared to the other signals.

Itsu
------------------------
CLR timing relationship.png
* CLR timing relationship.png (2.44 kB, 436x208 - viewed 31 times.)
   
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Re: Akula, Ruslan, Stalker, device discussion and replications. « Reply #543 on: 2023-08-30, 13:41:42 »
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Quote from: Itsu on 2023-08-29, 19:42:15
Partly typing over the earlier linked datasheet does not help here.

What i am looking for is the relationship of the CLR signal compared to the other signals.

Itsu

If I understand correctly, you are asking the function of the CLR line from the logic table and it is this- The CLR line is active high.  IOW, when a logic "1" is on the CLR input, all internal circuitry is cleared or reset.  When the CLR is at a logic "0", the clock is able to perform the assigned functions within the chip.

Pm
   
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